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LT1469 датащи(PDF) 11 Page - Linear Technology

номер детали LT1469
подробное описание детали  16-Bit, 250ksps, 짹10.24V True Bipolar, Pseudo-Differential Input ADC with 93.5dB SNR
PDF  26 Pages
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производитель  LINER [Linear Technology]
домашняя страница  http://www.linear.com
Logo LINER - Linear Technology

LT1469 датащи(HTML) 11 Page - Linear Technology

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LTC2326-16
11
232616fa
For more information www.linear.com/LTC2326-16
applicaTions inForMaTion
OVERVIEw
The LTC2326-16 is a low noise, high speed 16-bit suc-
cessive approximation register (SAR) ADC with pseudo-
differential inputs. Operating from a single 5V supply, the
LTC2326-16hasa±10.24Vtruebipolarinputrange,making
it ideal for high voltage applications which require a wide
dynamic range. The LTC2326-16 achieves ±1.5LSB INL
maximum, no missing codes at 16-bits and 93.5dB SNR.
The LTC2326-16 has an onboard single-shot capable
reference buffer and low drift (20ppm/°C max) 2.048V
temperature-compensated reference. The LTC2326-16
also has a high speed SPI-compatible serial interface that
supports1.8V,2.5V,3.3Vand5Vlogicwhilealsofeaturing
a daisy-chain mode. The fast 250ksps throughput with
no cycle latency makes the LTC2326-16 ideally suited
for a wide variety of high speed applications. An internal
oscillator sets the conversion time, easing external timing
considerations. The LTC2326-16 dissipates only 28mW
and automatically naps between conversions, leading to
reduced power dissipation that scales with the sampling
rate. A sleep mode is also provided to reduce the power
consumption of the LTC2326-16 to 300μW for further
power savings during inactive periods.
CONVERTER OPERATION
The LTC2326-16 operates in two phases. During the
acquisition phase, the charge redistribution capacitor
D/A converter (CDAC) is connected to the outputs of
the resistor divider networks that pins IN+ and INdrive
to sample an attenuated and level-shifted version of the
pseudo-differential analog input voltage as shown in Fig-
ure 3. A rising edge on the CNV pin initiates a conversion.
Duringtheconversionphase,the16-bitCDACissequenced
throughasuccessiveapproximationalgorithm,effectively
comparing the sampled input with binary-weighted frac-
tions of the reference voltage (e.g. VREFBUF/2, VREFBUF/4
… VREFBUF/65536) using the differential comparator. At
the end of conversion, the CDAC output approximates the
sampledanaloginput.TheADCcontrollogicthenprepares
the 16-bit digital output code for serial transfer.
Figure 2. LTC2326-16 Transfer Function
TRANSFER FUNCTION
The LTC2326-16 digitizes the full-scale voltage of ±2.5 •
REFBUF into 216 levels, resulting in an LSB size of 312.5µV
withREFBUF=4.096V.Theidealtransferfunctionisshown
in Figure 2. The output data is in 2’s complement format.
ANALOG INPUT
The analog inputs of the LTC2326-16 are pseudo-differen-
tial in order to reduce any unwanted signal that is common
to both inputs. The analog inputs can be modeled by the
equivalent circuit shown in Figure 3. The back-to-back
diodes at the inputs form clamps that provide ESD protec-
tion. Each input drives a resistor divider network that has
Figure 3. The Equivalent Circuit for the Differential
Analog Input of the LTC2326-16
RON
50
400
CIN
45pF
RON
50
0.63 • VREFBUF
CIN
45pF
IN+
IN
BIAS
VOLTAGE
1.6k
1.6k
400
0.63 • VREFBUF
232616 F03
INPUT VOLTAGE (V)
0V
–1
LSB
232616 F02
011...111
011...110
000...001
000...000
100...000
100...001
111...110
1
LSB
BIPOLAR
ZERO
111...111
FSR/2 – 1LSB
–FSR/2
FSR = +FS – –FS
1LSB = FSR/65536



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