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LTC2271 датащи(PDF) 20 Page - Linear Technology |
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LTC2271 датащи(HTML) 20 Page - Linear Technology |
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20 / 22 page ![]() LTC2385-18 20 238518f For more information www.linear.com/LTC2385-18 Figure 13. Valid Time Window for Clocking Out Data tFIRSTCLK tLASTCLK 238518 F13 CNV CLK 1 2 3 4 5 6 7 8 9 TIME WINDOW FOR CLOCKING OUT CONVERSION N CONVERSION N CONVERSION N+1 to run any digital track alongside an analog signal track or underneath the ADC. High quality ceramic bypass capacitors should be used at the VDD, VDDL, OVDD, VCM, REFIN, and REFBUF pins. Bypass capacitors must be located as close to the pins as possible. Size 0402 ceramic capacitors are recommended (except for REFBUF). The traces connecting the pins and bypass capacitors must be kept short and should be made as wide as possible. Of particular importance is the capacitor between REFBUF and REFGND, which should be a 10μF (X7R, 0805 size) ceramic capacitor. This capacitor should be on the same side of the circuit board as the ADC, and as close to the device as possible. Adding a second, smaller capacitor in parallel with the 10μF may degrade performance and is not recommended. Theanaloginputs,convertstart,anddigitaloutputsshould not be routed next to each other. Ground fill and grounded vias should be used as barriers to isolate these signals from each other. Exposed Package Pad For good electrical and thermal performance, the exposed pad on the bottom of the package must be soldered to a large grounded pad on the PC board. This pad should be connectedtotheinternalgroundplanesbyanarrayofvias. Mechanical Stress Shift The mechanical stress of mounting a part to a board can cause subtle changes to the SNR and internal voltage reference. The best soldering method is to use IR reflow or convection soldering with a controlled temperature profile. Hand soldering with a heat gun or a soldering iron is not recommended. |
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