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LTC2602 датащи(PDF) 20 Page - Linear Technology |
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LTC2602 датащи(HTML) 20 Page - Linear Technology |
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20 / 32 page ![]() LTC2320-12 20 Rev B For more information www.analog.com APPLICATIONS INFORMATION generated by the ADC and must be clamped by the user, if necessary. Single-Ended-to-Differential Conversion While single-ended signals can be directly digitized as pre- viously discussed, single-ended to differential conversion circuits may also be used when higher dynamic range is desired. By producing a differential signal at the inputs of the LTC2320-12, the signal swing presented to the ADC is maximized, thus increasing the achievable SNR. The LT®1819 high speed dual operational amplifier is recommendedforperformingsingle-ended-to-differential conversions, as shown in Figure 8. In this case, the first amplifier is configured as a unity-gain buffer and the single-ended input signal directly drives the high imped- ance input of this amplifier. Figure 8. Single-Ended to Differential Driver VREF 0V VREF 0V VREF 0V VREF/2 + – + – 200 200 LT1819 232012 F08 Fully-Differential Inputs To achieve the best distortion performance of the LTC2320-12, we recommend driving a fully-differential signal through LT1819 amplifiers configured as two unity-gain buffers, as shown in Figure 9. This circuit achieves the full data sheet THD specification of –90dB at input frequencies up to 500kHz. A fully-differential input signal can span the maximum full-scale of the ADC, up to ±REFOUT1,2,3,4. The common mode input voltage can span the entire supply range up to VDD, limited by the input signal swing. The fully-differential configuration is illustrated in Figure 10, with the corresponding transfer function illustrated in Figure 11. 25 25 220pF VREF 0V VREF 0V VREF 0V VREF 0V ONLY CHANNEL 1 SHOWN FOR CLARITY + – + – LTC2320-12 LT1819 232012 F10 SDO1 REF REFOUT1 CLKOUT AIN1– AIN1+ SCK TO CONTROL LOGIC (FPGA, CPLD, DSP, ETC.) 1µF 10µF Figure 9. LT1819 Buffering a Fully-Differential Signal Source VREF 0V VREF 0V VREF 0V VREF 0V + – + – LT1819 232012 F09 Figure 10. Fully-Differential Application Circuit |
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