LT1365 datasheet(12/20 Pages) LINER

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LT6274/LT6275

6275fa

For more information www.linear.com/LT6275

Circuit Operation

The LT6274/LT6275 circuit topology is a true voltage

feedback amplifier that has the slewing behavior of a cur-

rent feedback amplifier. The operation of the circuit can

be understood by referring to the simplified schematic.

The inputs are buffered by complementary NPN and PNP

emitter followers that drive a 1k resistor. The input voltage

appears across the resistor generating currents that are

mirrored into the high impedance node. Complementary

followers form an output stage that buffers the gain node

from the load. The bandwidth is set by the internal input

resistor and the capacitance on the high impedance node.

The slew rate is determined by the current available to

charge the gain node capacitance. This current is the dif-

ferential input voltage divided by R1, so the slew rate is

proportional to the input. This important characteristic

gives the LT6274/LT6275 superior slew performance

compared to conventional voltage feedback amplifiers in

which the slew rate is constrained by a fixed current (bias-

ing the input transistors) available to charge the gain node

capacitance (independent of the magnitude of the differen-

tial input voltage). Therefore, in the LT6274/LT6275, high-

est slew rates are seen in the lowest gain configurations.

For example, a 10V output step in a gain of 10 has only a

1V input step, whereas the same output step in unity gain

has a 10 times greater input step. The curve of Slew Rate

vs Input Level illustrates this relationship. The LT6274/

LT6275 are tested in production for slew rate in a gain of

–2 so higher slew rates can be expected in gains of 1 and

–1, with lower slew rates in higher gain configurations.

Special compensation across the output buffer allows the

LT6274/LT6275 to be stable with any capacitive load. The

RC network across the output stage is bootstrapped when

the amplifier is driving a light or moderate load and has

no effect under normal operation. When driving a capaci-

tive load (or a low value resistive load) the network is

incompletely bootstrapped and adds to the compensa-

tion at the high impedance node. The added capacitance

slows down the amplifier by lowering the dominant pole

frequency, improving the phase margin. The zero created

by the RC combination adds phase to ensure that even

for very large load capacitances, the total phase lag does

not exceed 180° (zero phase margin), and the amplifier

remains stable.

APPLICATIONS INFORMATION

Comparison to Current Feedback Amplifiers

The LT6274/LT6275 enjoy the high slew rates of Current

Feedback Amplifiers (CFAs) while maintaining the char-

acteristics of a true voltage feedback amplifier. The pri-

mary differences are that the LT6274/LT6275 have two

high impedance inputs, and the closed loop bandwidth

decreases as the gain increases. CFAs have a low imped-

ance inverting input and maintain relatively constant

bandwidth with increasing gain. The LT6274/LT6275 can

be used in all traditional op amp configurations including

integrators and applications such as photodiode ampli-

fiers and I-to-V converters where there may be significant

capacitance on the inverting input. The frequency com-

pensation is internal and does not depend on the value

of the external feedback resistor. For CFAs, by contrast,

the feedback resistance is fixed for a given bandwidth,

and capacitance on the inverting input can cause peaking

or oscillations. The slew rate of the LT6274/LT6275 in

noninverting gain configurations is also superior to that

of CFAs in most cases.

Input Considerations

Each of the LT6274/LT6275 inputs is the base of an NPN

and a PNP transistor whose base currents are of opposite

polarity and provide first-order input bias current cancel-

lation. Because of differences between NPN and PNP beta,

the polarity of the input bias current can be positive or

negative. The offset current does not depend on NPN/PNP

beta matching and is well controlled. The use of balanced

source resistance at each input is therefore recommended

for applications where DC accuracy must be maximized.

The inputs can withstand transient differential input volt-

ages up to ±10V without damage and need no clamping

or source resistance for protection. Differential inputs,

however, generate large supply currents (tens of mA) as

required for high slew rates. If the device is used with

sustained differential inputs, the average supply current

will increase, excessive power dissipation will result, and

the part may be damaged. The part should not be used

as a comparator, peak detector or in other open-loop

applications with large, sustained differential inputs.

Under normal, closed-loop operation, an increase of

power dissipation is only noticeable in applications with

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