LTC3877 datasheet(13/22 Pages) LINER

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LTC3874-1

38741f

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applicaTions inForMaTion

current occurs at the highest input voltage. To guarantee

that ripple current does not exceed a specified maximum,

the inductor should be chosen according to:

≥

VIN – VOUT

fOSC •IRIPPLE

•

VOUT

VIN

Inductor Core Selection

Once the inductance value is determined, the type of in-

ductor must be selected. Core loss is independent of core

size for a fixed inductor value, but it is very dependent on

inductance selected. As inductance increases, core losses

go down. Unfortunately, increased inductance requires

moreturnsofwireandthereforecopperlosseswillincrease.

Ferrite designs have very low core loss and are preferred

at high switching frequencies, so design goals can

concentrate on copper loss and preventing saturation.

Ferrite core material saturates “hard,” which means that

inductancecollapsesabruptlywhenthepeakdesigncurrent

is exceeded. This results in an abrupt increase in inductor

ripple current and consequent output voltage ripple. Do

not allow the core to saturate!

Power MOSFET and Schottky Diode

(Optional) Selection

When we use discrete gate driver and MOSFETs, at least

two external power MOSFETs need to be selected: One

N-channel MOSFET for the top (main) switch and one or

moreN-channelMOSFET(s)forthebottom(synchronous)

switch.Thenumber,typeandon-resistanceofallMOSFETs

selected take into account the voltage step-down ratio

as well as the actual position (main or synchronous) in

which the MOSFET will be used. A much smaller and much

lower input capacitance MOSFET should be used for the

top MOSFET in applications that have an output voltage

that is less than one-third of the input voltage. In applica-

tions where VIN >> VOUT, the top MOSFETs’ on-resistance

is normally less important for overall efficiency than its

input capacitance at operating frequencies above 300kHz.

MOSFET manufacturers have designed special purpose

devices that provide reasonably low on-resistance with

significantlyreducedinputcapacitanceforthemainswitch

application in switching regulators.

The peak-to-peak MOSFET gate drive levels are set by the

internal regulator voltage, VINTVCC, requiring the use of

logic-level threshold MOSFETs in most applications. Pay

close attention to the BVDSSspecificationfortheMOSFETs

as well; many of the logic-level MOSFETs are limited to

30V or less. Selection criteria for the power MOSFETs

include the on-resistance, RDS(ON), input capacitance,

inputvoltageandmaximumoutputcurrent.MOSFETinput

capacitance is a combination of several components but

can be taken from the typical gate charge curve included

on most data sheets (Figure 3). The curve is generated by

forcing a constant input current into the gate of a common

source, current source loaded stage and then plotting the

gate voltage versus time.

–

VDS

VIN

38741 F03

VGS

MILLER EFFECT

QIN

CMILLER = (QB – QA)/VDS

VGS

–

Figure 3. Gate Charge Characteristic

The initial slope is the effect of the gate-to-source and

the gate-to-drain capacitance. The flat portion of the

curve is the result of the Miller multiplication effect of the

drain-to-gate capacitance as the drain drops the voltage

across the current source load. The upper sloping line is

due to the drain-to-gate accumulation capacitance and

the gate-to-source capacitance. The Miller charge (the

increase in coulombs on the horizontal axis from a to b

while the curve is flat) is specified for a given VDS drain

voltage, but can be adjusted for different VDS voltages by

multiplying the ratio of the application VDS to the curve

specified VDS values. A way to estimate the CMILLER term

is to take the change in gate charge from points a and b

on a manufacturer’s data sheet and divide by the stated

VDS voltage specified. CMILLER is the most important se-

lection criteria for determining the transition loss term in

the top MOSFET but is not directly specified on MOSFET

data sheets. CRSS and COS are specified sometimes but

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