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LTC1871X

1871xf

For more information www.linear.com/LTC1871X

APPLICATIONS INFORMATION

Check the output ripple with a single oscilloscope

probe connected directly across the output capacitor

terminals, where the HF switching currents flow.

8. The choice of an input capacitor for a boost converter

depends on the impedance of the source supply and

the amount of input ripple the converter will safely tol-

erate. For this particular design and lab setup a 100µF

Sanyo Poscap (6TPC 100M), in parallel with two 22µF

Taiyo Yuden ceramic capacitors (JMK325BJ226MM)

is required (the input and return lead lengths are kept

to a few inches, but the peak input current is close to

20A!). As with the output node, check the input ripple

with a single oscilloscope probe connected across the

input capacitor terminals.

PC Board Layout Checklist

1. Inordertominimizeswitchingnoiseandimproveoutput

load regulation, the GND pin of the LTC1871X should

be connected directly to 1) the negative terminal of the

INTVCC decoupling capacitor, 2) the negative terminal

of the output decoupling capacitors, 3) the source of

the power MOSFET or the bottom terminal of the sense

resistor, 4) the negative terminal of the input capacitor

and 5) at least one via to the ground plane immediately

adjacent to Pin 6. The ground trace on the top layer of

the PC board should be as wide and short as possible

to minimize series resistance and inductance.

2. Beware of ground loops in multiple layer PC boards.

Try to maintain one central ground node on the board

and use the input capacitor to avoid excess input ripple

for high output current power supplies. If the ground

plane is to be used for high DC currents, choose a path

away from the small-signal components.

3. Place the CVCC capacitor immediately adjacent to the

INTVCC and GND pins on the IC package. This capacitor

carries high di/dt MOSFET gate drive currents. A low

ESR and ESL 4.7µF ceramic capacitor works well here.

4. The high di/dt loop from the bottom terminal of the

output capacitor, through the power MOSFET, through

the boost diode and back through the output capacitors

should be kept as tight as possible to reduce inductive

ringing. Excess inductance can cause increased stress

on the power MOSFET and increase HF noise on the

output. If low ESR ceramic capacitors are used on the

output to reduce output noise, place these capacitors

close to the boost diode in order to keep the series

inductance to a minimum.

5. Check the stress on the power MOSFET by measuring

its drain-to-source voltage directly across the device

terminals (reference the ground of a single scope probe

directly to the source pad on the PC board). Beware

of inductive ringing which can exceed the maximum

specified voltage rating of the MOSFET. If this ringing

cannot be avoided and exceeds the maximum rating

of the device, either choose a higher voltage device

or specify an avalanche-rated power MOSFET. Not all

MOSFETs are created equal (some are more equal than

others).

6. Place the small-signal components away from high

frequency switching nodes. In the layout shown in

Figure 13, all of the small-signal components have

been placed on one side of the IC and all of the power

components have been placed on the other. This also

allows the use of a pseudo-Kelvin connection for the

signal ground, where high di/dt gate driver currents

flow out of the IC ground pin in one direction (to the

bottom plate of the INTVCC decoupling capacitor) and

small-signal currents flow in the other direction.

7. If a sense resistor is used in the source of the power

MOSFET, minimize the capacitance between the SENSE

pin trace and any high frequency switching nodes. The

LTC1871X contains an internal leading edge blanking

timeofapproximately180ns,whichshouldbeadequate

for most applications.

8. For optimum load regulation and true remote sensing,

the top of the output resistor divider should connect

independently to the top of the output capacitor (Kelvin

connection), staying away from any high dV/dt traces.

Place the divider resistors near the LTC1871X in order

to keep the high impedance FB node short.

9. For applications with multiple switching power con-

verters connected to the same input supply, make

sure that the input filter capacitor for the LTC1871X

is not shared with other converters. AC input current

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