AT45DB321C datasheet(10/37 Pages) ATMEL

10 / 37 page

AT45DB321C [Preliminary]

3387B–DFLSH–9/04

tialize the read operation. After the 32 don’t care clock cycles, any additional clock

pulses on the SCK pin will result in data being output on the SO (serial output) pin. The

read will begin with Byte_1 of the Sector Protection Register for Sector_0, followed with

Byte_2 for Sector_1. The read operation will continue until Byte_16 for Sector_15 is

read. Once the last byte is read a low-to-high transition on the CS pin is required to ter-

minate the read operation.

VARIOUS ASPECTS ABOUT THE SECTOR PROTECTION REGISTER: Due to the

sharing of the internal circuitry, the contents of the buffer 1 will get modified during the

erase and programming of Sector Protection Register. If the device is powered down

during erasing or programming the sector protection register, then the contents of the

Sector Protection Register cannot be guaranteed. The Sector Protection Register can

be erased or reprogrammed with the sector protection enabled or disabled. Being able

to reprogram the Sector Protection Register with the sector protection enabled allows

the user to temporarily disable the sector protection to an individual sector rather than

disabling the sector protection completely.

The Sector Protection Register is subject to the same endurance characteristics as the

main memory array. Users are encouraged to carefully evaluate the number of times the

Sector Protection Register will be modified during the course of the applications’ life

cycle. If the application requires that the Sector Protection Register be modified more

than the specified endurance of the DataFlash because the application needs to tempo-

rarily unprotect individual sectors (sector protection remains enabled while the Sector

Protection Register is reprogrammed), then the application will need to limit this prac-

tice. Instead, a combination of temporarily unprotecting individual sectors along with

disabling sector protection completely will need to be implemented by the application to

ensure that the endurance limits of the device are not exceeded.

Command

Byte 1

Byte 2

Byte 3

Byte 4

Read Sector Protection Register

32H

00H

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