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LTC6950 датащи(PDF) 4 Page - Linear Technology |
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LTC6950 датащи(HTML) 4 Page - Linear Technology |
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4 / 12 page ![]() 4 dc1795af DEMO MANUAL DC1795A Quick start proceDure troubleshooting If the green LED does not illuminate, follow the instruc- tions below: 1. Verify that you are able to communicate with the DC1795A.ThebottomstatuslineinClockWizardshould read “LTC6950” and “Comm Enabled.” 2. Verify that V+ = 3.15V to 3.45V, V+ to 5.25V and V+ VCXO turrets have the correct voltages on them (see theTypicalDC1795ARequirementsandCharacteristics table). 3. Select “Status” Output = 2 in ClockWizard’s System Tab. Click “Read All.” See if the NO_VCO or NO_REF boxes in the second column are checked. a. If NO_REF is checked, verify the “V+ XO” test point voltage is set to 3.3V. Verify R73 is installed (0 ohm) b. IF NO_VCO is checked, verify the components between U4 and U1 match the default BOM. Contact the factory for further troubleshooting. Dc1795a reconfiguration The DC1795A allows the use of a variety of references, VCOs and active or passive loop filters. The following covers the hardware reconfiguration of the DC1795A. Refer to ClockWizard and the LTC6950 data sheet to bet- ter understand how to change programmed parameters on the DC1795A. ltC6950 Clkset Files The ClockWizard provides three different clkset files for evaluation purposes. These files were made for the default bill of materials. If board modifications are made, these files or the loop filter may need to be modified for the LTC6950 to lock correctly. 1. LTC6950_PECL0_250MHz.clkset:Producesa250MHz output on PECL0. All other outputs are powered down. 2. LTC6950_Figure16_250MHZ.clkset: Matches Figure 16 of the LTC6950 data sheet. To sync outputs, refer to the EZSync Function section. 3. LTC6950_ALL_CHAN_250MHz.clkset: Produces a 250MHz output on all five outputs. To sync outputs, refer to the EZSync Function section. ezsync FunCtion Apply a 1ms or longer high pulse to the SYNC SMA con- nector to take advantage of the EZSync function. Refer to the LTC6950 data sheet for SYNC timing and level requirements. lVPeCl outPut oPtions The DC1795A has four AC coupled LVPECL outputs. Internal biasing (IBIASx = H) is required with this default termination network. The DC1795A has options for pull downorseriesresistorstoaccommodatetheotherLVPECL termination networks described in the data sheet. lVDs/CMos outPut oPtions The LVDS/CMOS output is DC coupled without on-board termination by default. The DC1795A provides pull down, series and a differential termination resistor options to accommodate other termination networks described in the data sheet. |
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