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dc2178af

DEMO MANUAL DC2178A

operating characteristics

DANGER! High voltage testing shall be performed by

qualified personnel only. As a safety precaution at least

two people shall be present during high voltage testing.

Board Layout

DC2178A is a 2 layer board. There are planes for input,

output and ground; these are replicated on both layers.

There are exposed conductors on the bottom of the board,

and any banana plugs present will protrude through the

bottom of the board. The underlying surface should be

non-conductive and clear of any wire, solder and other

conductive debris.

The input plane is designed to have at least 79 mil (2mm)

clearance to adjacent conductors, to support 80VDC

standoff and transients to 250V. Spikes and surges are

withstoodbyR1,RDRN,CSNUBandQ1.Thesecomponents

are chosen for wide pad spacing, pulse power capability

and voltage standoff, but ultimately limit the maximum

transient input voltage to approximately 250V. The time

spent above 80V is limited by the pulse power capability

of Q1 and R1.

Operation

DC2178A is designed for 12V operation with a load of up

to 1A, and 24V or 28V operation with a load of up to 0.5A.

JP1 selects an output clamping voltage of either 27V or

45V. For 24V and 28V supplies use a clamping voltage

of 45V; 12V supplies may use either 27V or 45V. If the

load tolerates the higher voltage, 45V clamping is better

than 27V in 12V applications because it reduces the drop

across the MOSFET (Q1) and therefore the safe operating

area stress, giving longer ride-through time during an

overvoltage condition.

Q1 is selected to ride through load dump events (such as

ISO 16750-2 Test A) with full load in 12V (1A) and 24V/28V

(0.5A) systems. Ride through is also permissible at 1A

for a 250V input transient of up to 1ms.

Upto80VDCcanbeappliedtotheinput.Thecircuitwilltrip

off after a delay of approximately 350ms for 1A load and

a 27V clamp, or 800ms for a 0.5A load and a 45V clamp.

The TMR pin charging current is a function of the power

dissipated in Q1 so that the exact delay time is a function

of the input voltage, output voltage and load current.

The LTC4380 features current limiting, which is set with

RSNS (40mΩ) to a value of 1.25A. Current limit does not

change with operating voltage or clamping voltage selec-

tion. If the output is shorted so that the output voltage falls

to 2V or less, current limit increases to 1.55A. In current

limit, the LTC4380 trips off after a delay that varies as a

function of the dissipation in Q1.

WhiletheLTC4380isdesignedtowithstandreverseinputs

of up to −60V, DC2178A does not tolerate negative-going

events because Q1’s body diode will pass the negative

voltage straight through to the output and load. Nega-

tive inputs are easily blocked by the addition of a series

input diode, or by adding a second MOSFET as shown in

Figures 5 and 7 of the LTC4380 data sheet.

a 20kΩ resistor (R1), filtered by a 2.2μF capacitor (C1A),

andclampedbyD1to68V.Thisarrangementofferstwokey

duringbriefinputdropoutsandtofilterovervoltagespikes.

is unnecessary in 12V applications because the filtering

below 80V, even in load dump.

12V Cold Crank Operation

An FDB33N25 was chosen for MOSFET Q1 to satisfy two

requirements: ability to block load dump (≈200V) in 28V

systems; and wide safe operating area for uninterrupted

operation during load dump events. The penalty for these

features is a high threshold voltage of 5V maximum at

extremes. R1 was chosen to limit the peak current in D1

to a safe level with 250V peak input voltage, but it also

conditions. Q1 and R1 impact cold crank operation in

12V systems.

The LTC4380 is designed to deliver 10V of gate drive with

over temperature. Thus, the FDB33N25 is incompatible

with operation in the 4V to 8V range, although typical

DC2178A assemblies can deliver 500mA load current