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LT8580

8580fa

For more information www.linear.com/LT8580

applicaTions inForMaTion

For the SEPIC or dual inductor inverting topology (see

Figure 1 and Figure 2):

DC ≅

VD + |VOUT|

VIN +|VOUT|+ VD − VCESAT

The LT8580 can be used in configurations where the duty

cycle is higher than DCMAX, but it must be operated in the

discontinuous conduction mode so that the effective duty

cycle is reduced.

Inductor Selection

General Guidelines: The high frequency operation of the

LT8580allowsfortheuseofsmallsurfacemountinductors.

For high efficiency, choose inductors with high frequency

core material, such as ferrite, to reduce core losses. To

improve efficiency, choose inductors with more volume

for a given inductance. The inductor should have low

DCR (copper wire resistance) to reduce I2R losses, and

must be able to handle the peak inductor current without

saturating. Note that in some applications, the current

handling requirements of the inductor can be lower, such

as in the SEPIC topology, where each inductor only carries

a fraction of the total switch current. Multilayer or chip

inductors usually do not have enough core area to sup-

port peak inductor currents in the 1A to 2A range. To

minimize radiated noise, use a toroidal or shielded induc-

tor. Note that the inductance of shielded types will drop

more as current increases, and will saturate more easily.

See Table 1 for a list of inductor manufacturers. Thorough

lab evaluation is recommended to verify that the following

guidelines properly suit the final application.

Table 1. Inductor Manufacturers

Coilcraft

XAL5050, MSD7342, MSS7341 and

LPS4018 Series

www.coilcraft.com

Coiltronics DR, DRQ, LD and CD Series

www.coiltronics.com

Sumida

CDRH8D58/LD, CDRH64B, and

CDRH70D430MN Series

www.sumida.com

Würth

WE-PD, WE-DD, WE-TPC,

WE-LHMI and WE-LQS Series

www.we-online.com

Minimum Inductance: Although there can be a trade-off

with efficiency, it is often desirable to minimize board

space by choosing smaller inductors. When choosing

Setting Output Voltage

The output voltage is set by connecting a resistor (RFBX)

from VOUT to the FBX pin. RFBX is determined from the

following equation:

RFBX=

|VOUT − VFBX|

83.3µA

where VFBX is 1.204V (typical) for noninverting topologies

(i.e., boost and SEPIC regulators) and 3mV (typical) for

inverting topologies (see the Electrical Characteristics).

Power Switch Duty Cycle

In order to maintain loop stability and deliver adequate

current to the load, the power NPN (Q1 in the Block Dia-

gram) cannot remain “on” for 100% of each clock cycle.

The maximum allowable duty cycle is given by:

DCMAX =

(TP −MinOffTime)

• 100%

where TP is the clock period and Min Off Time (found in

the Electrical Characteristics) is typically 100ns.

The application should be designed so that the operating

duty cycle does not exceed DCMAX.

The minimum allowable duty cycle is given by:

DCMIN =

Min On Time

• 100%

where TP is the clock period and Minimum On Time is as

shown in the Typical Performance Characteristics.

The application should be designed so that the operating

duty cycle is at least DCMIN.

Duty cycle equations for several common topologies are

given below, where VD is the diode forward voltage drop

and VCESAT is typically 400mV at 0.75A.

For the boost topology:

DC ≅

VOUT − VIN + VD

VOUT + VD − VCESAT

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