ADC101S021 datasheet(4/13 Pages) NSC

4 / 13 page

ADC081S051 Converter Electrical Characteristics (Note 9) (Continued)

The following specifications apply for V

A = +2.7V to 5.25V, GND = 0V, fSCLK = 4 MHz to 10 MHz,

SAMPLE = 200 kSPS to 500 kSPS, unless otherwise noted. Boldface limits apply for TA =TMIN to TMAX: all other limits TA =

25˚C.

Symbol

Parameter

Conditions

Typical

Limits

(Note 9)

Units

ANALOG INPUT CHARACTERISTICS

Input Range

0 to V

DCL

DC Leakage Current

±1

µA (max)

INA

Input Capacitance

Track Mode

Hold Mode

DIGITAL INPUT CHARACTERISTICS

Input High Voltage

A = +5.25V

2.4

V (min)

Input Low Voltage

A = +5.25V

0.8

V (max)

A = +3.6V

0.4

V (max)

Input Current

IN =0VorVA

±0.1

±1

µA (max)

IND

Digital Input Capacitance

pF (max)

DIGITAL OUTPUT CHARACTERISTICS

Output High Voltage

SOURCE = 200 µA

A − 0.03

A − 0.2

V (min)

SOURCE =1mA

A − 0.1

Output Low Voltage

SINK = 200 µA

0.03

0.4

V (max)

SINK = 1 mA

0.1

OZH,

OZL

TRI-STATE® Leakage Current

±0.1

±10

µA (max)

OUT

TRI-STATE® Output Capacitance

pF (max)

Output Coding

Straight (Natural) Binary

POWER SUPPLY CHARACTERISTICS (C

L =10pF)

Supply Voltage

2.7

V (min)

5.25

V (max)

Supply Current, Normal Mode

(Operational, CS low)

A = +5.25V,

SAMPLE = 200 kSPS

2.0

2.4

mA (max)

A = +3.6V,

SAMPLE = 200 kSPS

0.8

1.0

mA (max)

Supply Current, Shutdown (CS high)

SCLK= 0 MHz, VA = +5.25V

SAMPLE = 0 kSPS

0.5

µA

A = +5.25V, fSCLK = 10MHz,

SAMPLE = 0 kSPS

µA

Power Consumption, Normal Mode

(Operational, CS low)

A = +5.25V

10.5

12.6

mW (max)

A = +3.6V

2.9

3.6

mW (max)

Power Consumption, Shutdown (CS

high)

SCLK = 0 MHz, VA = +5.25V

SAMPLE = 0 kSPS

2.6

µW

A = +5.25V, fSCLK = 10 MHz,

SAMPLE = 0 kSPS

0.12

AC ELECTRICAL CHARACTERISTICS

SCLK

Clock Frequency

(Note 8)

MHz (min)

MHz (max)

Sample Rate

(Note 8)

200

kSPS (min)

500

kSPS (max)

CONV

Conversion Time

SCLK cycles

SCLK Duty Cycle

SCLK = 10 MHz

% (min)

% (max)

ACQ

Track/Hold Acquisition Time

400

ns (max)

Throughput Time

Acquisition Time + Conversion Time

SCLK cycles

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