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XRT7296IP датащи(PDF) 5 Page - Exar Corporation

номер детали XRT7296IP
подробное описание детали  INTEGRATED LINE TRANSMITTER
PDF  16 Pages
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производитель  EXAR [Exar Corporation]
домашняя страница  http://www.exar.com
Logo EXAR - Exar Corporation

XRT7296IP датащи(HTML) 5 Page - Exar Corporation

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XRT7296
&
 
ELECTRICAL CHARACTERISTICS (See Figure 8 )
Test Conditions: VDD =5V ± 5%, TA = -40C to +85C, unless otherwise specified. All timing characteristics
are measured with 10pF loading.
Symbol
Parameter
Min.
Typ.
Max.
Units
AC Electrical Characteristics
# +/; , - -/+ '  *(
&
&
&&
.
# +/; , - -/+ '(
"
&
&
.

# +/;   '.  %.(


$
# +/; $++  '.  %.(


?
07  # $++   ? 


:=
07  # $++  :+ 
&

I
075  #   0   +- 
)


# +/; , - -/+
&
&
&&
.

# +/;   '.  %.(


$
# +/; $++  '.  %.(


?
07  # $++   ? 


:=
07  # $++  :+ 
&


#= +/;   '.  %.(


$
#= +/; $++  '.  %.(


I
0=7579  #=   0  
+- 


DC Electrical Characteristics
<
<
 , +- <+ 
"&
&
&&
<
, +- , 


<
, 2 <+ 

&
<
<:
, :1 <+ 
<J "
<
<
<=
=, , 2 <+  =?K*
57

<
<=:
=, , :1 <+  =?K
< * &
<
<

, ; , 
±


0 %) ' , K<(
*&
*&


,  /  /

$

  /  /

$
Notes:
1 When the encoder is enabled, a handling delay of four and a half TCLK clock cycles for B3ZS and five and half clock cycles for HDB3
always exists between TPDATA/TNDATA and TTIP/TRING. The handling delay is reduced to two clock cycles when the encoder
is disabled.
2 When the decoder is enabled, a handling delay of six and a half RCLK clock cycles will always exist between RPDATA/RNDATA
and RPOS/RNEG/RNRZ. The handling delay is reduced to one and half RCLK clock cycles when the decoder is disabled.
3 Supply current is measured with transmitter sending all ones AMI signal and with Transmit Level (TXLEV) set to high.
4 All inputs except pin 19, 20 and pin 26.
Specifications are subject to change without notice



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