VV6444 datasheet(56/60 Pages) STMICROELECTRONICS

56 / 60 page

PRELIMINARY

Digital Camera Chipset; Customer Datasheet, Rev 3.0, March 2000

STV0680A + VV6444/6410/6500

CDSTV0680F-C

Commercial in confidence

STV0680F_500_pckg.fm

CLKIN

↑

LVDS negative Clock input

LST/D[5]

ODT

Tri-stateable Line start output

May be configured as tri-stateable output data bit 5 D[5].

FST/D[6]

ODT

Tri-stateable Frame start signal.

May be configured as tri-stateable output data bit 6 D[6].

D[7]

ODT

Tri-stateable Data wire (ms data bit).

May be configured as tri-stateable output data bit 6 D[6].

OEB

↓

Digital output (tri-state) enable.

DIGITAL CONTROL SIGNALS

RESETB

↑

System Reset. Active Low.

May be configured as System Sync. Active Low.

SUSPEND

↑

USB Suspend Mode Control signal. Active High

If this feature is not required then the support circuit must pull the pin to

ground. The combination of an active high signal and pull up pad was

chosen to limit current drawn by the device while in suspend mode.

SERIAL INTERFACE

SCL

↑

Serial bus clock (input only).

SDA

↑

Serial bus data (bidirectional, open drain).

SYSTEM CLOCKS

CLKI/CLKIP

↓

Schmitt Buffered Clock input or LVDS positive Clock input

Not connected

10, 14, 19, 22-

28, 48

Not connected

Key

Analog Input

Digital Input

Analog Output

↑

Digital input with internal pull-up

Bidirectional

↓

Digital input with internal pull-down

↑

Bidirectional with internal pull-up

Digital Output

↓

Bidirectional with internal pull-down

ODT

Tri-stateable Digital Output

Name

Pin Number

Type

Description

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