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LTP5901-IPR датащи(PDF) 28 Page - Linear Technology |
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LTP5901-IPR датащи(HTML) 28 Page - Linear Technology |
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28 / 34 page ![]() LTP5901-IPR/LTP5902-IPR 28 59012iprfa For more information www.linear.com/LTP5901-IPR or www.linear.com/LTP5902-IPR Figure 12. Eterna State Diagram Serial Flash Emulation When both RESETn and FLASH_P_ENn are asserted, Eterna disables normal operation and enters a mode to emulate the operation of a serial flash. In this mode, its flash can be programmed. Operation Once Eterna has completed start-up, Eterna transitions to the operational group of states (active/CPU active, active/ CPU inactive, and Doze). There, Eterna cycles between the various states, automatically selecting the lowest pos- sible power state while fulfilling the demands of network operation. SERIAL FLASH EMULATION LOAD FUSE SETTINGS RESETn LOW AND FLASH_P_ENn HIGH RESETn HIGH AND FLASH_P_ENn HIGH RESET DEASSERT RESETn CPU AND PERIPHERALS INACTIVE HW OR PMU EVENT BOOT START-UP OPERATION INACTIVE DOZE DEEP SLEEP LOW POWER SLEEP COMMAND 59012IPR F12 ASSERT RESETn ASSERT RESETn ASSERT RESETn CPU ACTIVE CPU INACTIVE POWER-ON RESET RESETn LOW AND FLASH_P_ENn LOW SET RESETn HIGH AND FLASH_P_ENn HIGH FOR 125µs, THEN SET RESETn LOW VSUPPLY > PoR ACTIVE operaTion |
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