MP8757–18V, HIGH CURRENT SYNCHRONOUS BUCK CONVERTER

MP8757 Rev. 1.0

www.MonolithicPower.com

12

5/1/2018

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As the output current increases from the light

load condition, the time period within which the

current modulator regulates becomes shorter.

The HS-FET is turned ON more frequently.

Hence,

the

switching

frequency

increases

correspondingly. The output current reaches the

critical level when the current modulator time is

zero. The critical level of the output current is

determined as follows:

IN

OUT

OUT

OUT

S

IN

(V

V

) V

I

2 L F

V





  

(1)

It turns into PWM mode once the output current

exceeds the critical level. After that, the switching

frequency stays fairly constant over the output

current range.

Jitter and FB Ramp Slope

Jitter occurs in both PWM and skip modes when

HS-FET driver, as shown in Figures 4 and 5.

Jitter can affect system stability, with noise

directly affect noise immunity.

Figure 4

—Jitter in PWM Mode

Figure 5

—Jitter in Skip Mode

Operating without external ramp

The traditional constant-on-time control scheme

is intrinsically unst

able if output capacitor’s ESR

is not large enough as an effective current-sense

resistor. Ceramic capacitors usually can not be

used as output capacitor.

To realize the stability, the ESR value should be

chosen as follow:

SW

ON

ESR

OUT

TT

0.7

2

R

C







(2)

The

MP8757

has

built

in

internal

ramp

compensation to make sure the system is stable

even without the help of output capacitor’s ESR;

and thus the pure ceramic capacitor solution can

be applicant. The pure ceramic capacitor solution

can significantly reduce the output ripple, total

BOM cost and the board area.

Figure 6 shows a typical output circuit in PWM

mode without an external ramp circuit. Turn to

application information section for design steps

without external compensation.

R1

R2

CAP

SW

FB

Vo

L

C4

Figure 6

—Simplified Circuit in PWM Mode

without External Ramp Compensation

When using a large-ESR capacitor on the output,

add a ceramic capacitor with a value of 10uF or

less to in parallel to minimize the effect of ESL.

Operating with external ramp compensation

The MP8757 is usually able to support ceramic

output capacitors without external ramp, however,

in some of the cases, the internal ramp may not

be enough to stabilize the system, and external

ramp

compensation

is

needed.

Skip

to

application information section for design steps

with external ramp compensation.