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DM7556 датащи(PDF) 3 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
номер детали DM7556
подробное описание детали  TRI-STATE Programmable Binary Counters
PDF  8 Pages
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производитель  NSC [National Semiconductor (TI)]
домашняя страница  http://www.national.com
Logo NSC - National Semiconductor (TI)

DM7556 датащи(HTML) 3 Page - National Semiconductor (TI)

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Electrical Characteristics over recommended operating free air temperature range (unless otherwise noted)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
(Note 1)
VI
Input Clamp Voltage
VCC e Min II eb12 mA
b
15
V
VOH
High Level Output
VCC e Min IOH e Max
24
V
Voltage
VIL e Max VIH e Min
VOL
Low Level Output
VCC e Min IOL e Max
04
V
Voltage
VIH e Min VIL e Max
II
Input Current
Max
VCC e Max VI e 55V
1mA
Input Voltage
IIH
High Level Input Current
VCC e Max VI e 24V
40
m
A
IIL
Low Level Input Current
VCC e Max VI e 04V
b
16
mA
IOZH
Off-State Output Current with
VCC e Max VO e 24V
High Level Output
VIH e Min VIL e Max
40
m
A
Voltage Applied
IOZL
Off-State Output Current with
VCC e Max VO e 04V
Low Level Output
VIH e Min VIL e Max
b
40
m
A
Voltage Applied
IOS
Short Circuit
VCC e Max
DM75
b
25
b
70
mA
Output Current
(Note 2)
DM85
b
25
b
70
ICC
Supply Current
VCC e Max
75
100
mA
Note 1
All typicals are at VCC e 5V TA e 25 C
Note 2
Not more than one output should be shorted at a time
Switching Characteristics at VCC e 5V and TA e 25 C (See Section 1 for Test Waveforms and Output Load)
From (Input)
RL e 400X
Symbol
Parameter
To (Output)
CL e 5pF
CL e 50 pF
Units
Min
Max
Min
Max
fMAX
Maximum Clock Frequency
25
MHz
tPLH
Propagation Delay Time
Clock to
22
ns
Low to High Level Output
Output
tPHL
Propagation Delay Time
Clock to
44
ns
High to Low Level Output
Output
tPLH
Propagation Delay Time
Clock to
33
ns
Low to High Level Output
MAX-CNT
tPHL
Propagation Delay Time
Clock to
33
ns
High to Low Level Output
MAX-CNT
tPHL
Propagation Delay Time
Reset to
44
ns
High to Low Level Output
Output
tPZH
Output Enable Time
Output
20
ns
to High Level Output
Disable to Q
tPZL
Output Enable Time
Output
20
ns
to Low Level Output
Disable to Q
tPHZ
Output Disable Time
Output
12
ns
from High Level Output
Disable to Q
tPLZ
Output Disable Time
Output
20
ns
from Low Level Output
Disable to Q
3



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