MP3421—5.5A, 600KHZ HIGH EFFICIENCY, SYNCHRONOUS, STEP-UP CONVERTER WITH OUTPUT DISCONNECT IN 2X2MM QFN PACKAGE

MP3421 Rev. 1.0

www.MonolithicPower.com

13

11/13/2014

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APPLICATION INFORMATION

COMPONENT SELECTION

Input Capacitor Selection

Low ESR input capacitors reduce input-

switching noise and reduce the peak current

drawn from the battery. Ceramic capacitors are

recommended for input decoupling and should

be located as close to the device as possible. A

ceramic

capacitor

larger

than

22μF

is

Output Capacitor Selection

To ensure stability over the full-operating range,

the output capacitor requires a minimum

capacitance value of 22μF at the programmed

output voltage. A higher capacitance value may

be required to lower both the output ripple and

the transient ripple. Low ESR capacitors, such

as X5R or X7R type ceramic capacitors are

recommended. Supposing that ESR is zero, the

minimum output capacitor to support the ripple

in the PWM mode can be calculated by:

O

OUT(MAX)

IN(MIN)

O

SOUT(MAX)

I(V

V

)

C

fV

ΔV

×−

≥

××

Where,

ΔV= Acceptable output ripple

A 1μF ceramic capacitor is recommended

between the OUT and PGND. This reduces

spikes on the SW node and improves EMI

performance.

Inductor Selection

Due to the 600kHz switching frequency, the

MP3421 utilizes small surface mount-chip

inductors, Inductor values run between 1μH and

2.2μH, and they are suitable for most

applications. Larger inductance values allow

slightly greater output-current capability by

reducing the inductor-ripple current. However,

larger

inductance

values

also

increase

component size. The minimum inductance

value is given by:

IN(MIN)

OUT(MAX)

IN(MIN)

OUT(MAX)

L

S

V(V

V

)

L

VI

f

×

−

≥

×Δ ×

(3)

The inductor-current ripple is typically set at

30% to 40% of the maximum inductor current.

The inductor should have low DCR (inductor

current series resistance without saturating

windings) to reduce the resistive power loss.

enough to support the peak current.

PCB Layout Considerations

Proper PCB layout for high-frequency switching

power supplies is critical. Poor layout results in

weak performance, excessive EMI, resistive

loss and system instability.

The steps below ensure a good layout design:

1. The output capacitor must be placed as

close as possible to the OUT, with minimal

distance from PGND. A small decoupling

capacitor should be parallel with the bulk

output capacitor and placed as close as

possible to the OUT. This is critical for

reducing spikes on the SW and improving

EMI performance.

2.

The input capacitor and inductor should be

as close as possible to the IN and SW.

The trace between the inductor and the SW

should be as wide and short as possible.

3. The feedback loop should be far from any

noise sources, such as the SW.

The

feedback divider resistors should be as

close as possible to the FB and AGND.

4. The ground return of the input/output

capacitors should be tied as close as

possible to the PGND with a large copper

GND area.

Vias around the GND are

recommended to lower the die temperature.

5. INA must be connected to IN.

NC can

either float or be connected to GND.