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MP9472 датащи(PDF) 13 Page - Monolithic Power Systems |
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MP9472 датащи(HTML) 13 Page - Monolithic Power Systems |
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13 / 16 page ![]() MP9472–0.45A, 18V, NON-SYNCHRONOUS, RECTIFIED, STEP-DOWN CONVERTER MP9472 Rev. 1.0 www.MonolithicPower.com 13 12/9/2015 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2015 MPS. All Rights Reserved. In this case, a third pole set by the compensation capacitor (CPOLE, from COMP to GND) and the compensation resistor (R3) is used to compensate for the effect of the ESR zero on the loop gain. This pole can be determined with Equation (17): P3 POLE 1 f 2C R3 = π× × (17) The goal of the compensation design is to shape the converter transfer function to obtain a desired loop gain. The system crossover frequency where the feedback loop has unity gain is important. Lower crossover frequencies result in slower line and load transient responses, while higher crossover frequencies can cause system instability. It is recommended to set the crossover frequency below one-tenth of the switching frequency. To optimize the compensation components, the following procedure can be used. 1. Choose the compensation resistor (R3) to set the desired crossover frequency. R3 can be determined with Equation (18): FB OUT CS EA S FB OUT CS EA C V V G G f 1 . 0 2 C 2 V V G G f 2 C 2 3 R × × × × × π < × × × × π = (18) Where fC is the desired crossover frequency, typically below one-tenth of the switching frequency. 2. Choose the compensation capacitor (C3) to achieve the desired phase margin. For applications with typical inductor values, setting the compensation zero (fZ1) below one-fourth of the crossover frequency provides sufficient phase margin. Determine the C3 value with Equation (19): C f 3 R 2 4 3 C × × π > (19) Where R3 is the compensation resistor. 3. Determine if a second compensation capacitor (CPOLE, from COMP to GND) is required. It is required if the frequency of the zero created by the ESR of the output capacitor is less than half of the switching frequency. Otherwise, Equation (20) is valid: S ESR f 1 2C2 R 2 < π× × (20) If this is the case, then add a second compensation capacitor (CPOLE) to set the pole (fP3) at the location of the ESR zero. Determine the CPOLE value with Equation (21): ESR POLE C2 R C R3 × = (21) External Bootstrap Diode An external bootstrap diode may enhance the efficiency of the regulator and is required under the following conditions: • VOUT = 5V or 3.3V • Duty cycle is high: D = IN OUT V V > 65% In these cases, an external BST diode is recommended from the output of the voltage regulator to BST (see Figure 2). Figure 2: Optional External Bootstrap Diode Added to Enhance Efficiency The recommended external BST diode is IN4148, and the recommended BST cap is 0.01µF. The MP9472 charges the BST capacitor through an internal 5V power supply. During each period, it pulls SW to GND internally to charge the BST capacitor. In light-load mode, if SW cannot be pulled down to GND and charge the BST voltage high enough, even when the duty cycle is low and the external bootstrap diode is added, avoid running the MP9472 in extremely light loads or adding a dummy load to keep it in normal operation. |
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