MP8847 – 6A, 2.7V-6V, HIGH-EFFICIENCY, SYNCHRONOUS

STEP-DOWN SWITCHER WITH I

MP8847 Rev. 1.02

www.MonolithicPower.com

13

12/28/2017

MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.

© 2017 MPS. All Rights Reserved.

REGISTERSAND DESCRIPTION

Register Map

ADD

NAME

R/W

D7

D6

D5

D4

D3

D2

D1

D0

00

Status

R

ILIM

UVLO

OVP

VoOV

VoUV

PGOOD

OTW

EN stat

01

VSEL

R/W

EN

Output reference

02

SysCntlreg1

R/W

Switching frequency

Transient response

Pglohi

Vinovp

Mode

03

SysCntlreg2

R/W

Reserved

Go

Out-dis

Gl_filt

Slew

rate

PG

control

PG set

04

ID1

R

Vendor ID

Die ID

05

ID2

R

Reserved

Die rev

NOTE:

Theburst write cannot be on Reg.03.

Default Value of Registers

ADD

NAME

R/W

D7

D6

D5

D4

D3

D2

D1

D0

00

Status

R

NA

NA

NA

NA

NA

NA

NA

NA

01

VSEL

R/W

1

1

0

0

0

1

1

0

02

SysCntlreg1

R/W

1

0

0

0

1

1

0

0

03

SysCntlreg2

R/W

0

0

0

0

0

0

0

1

04

ID1

R

0

0

0

1

0

0

0

1

05

ID2

R

0

0

0

0

0

0

0

0

Register Description

1. Reg00 Status

NAME

BITS

DESCRIPTION

ILIM

D7

When the bit is high, IC is in the current limit.

UVLO

D6

When the bit is high,VIN is less than the UVLO threshold.

OVP

D5

When the bit is high,VIN is greater than the OVP threshold.

VoOV

D4

When the bit is high, a voltage higher than 110% of the regulation voltage is presented.

VoUV

D3

When the bit is high, a voltage lower than 90% of the regulation voltage is presented.

PGOOD

D2

When the bit is high, the output is in regulation; otherwise, the output voltage is out of

the ±10% regulation window.

OTW

D1

When the junction temperature is higher than 130°C, the bit is high; otherwise, the bit

is low.

En stat

D0

When the bit is high, the SMPS is enabled; when the bit is low, the SMPS is disabled.

2. Reg01 VSEL

NAME

BITS

DESCRIPTION

EN

D7

I

bit takes over.

Output

Reference

D[6:0]

Sets the output voltage from 0.6V to 1.235V (see Table 1).