MP4423 – 36V, 3A SYNCHRONOUS STEP-DOWN CONVERTER

MP4423 Rev. 1.0

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13

8/18/2014

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The MP4423 exits the hiccup mode once the

over-current condition is removed.

Thermal Shutdown

Thermal shutdown prevents the chip from

operating at exceedingly high temperatures.

When the silicon die temperature exceeds 170°C,

it shuts down the whole chip. When the

temperature drops below its lower threshold

(typically 140°C) the chip is enabled again.

Floating Driver and Bootstrap Charging

An external bootstrap capacitor power the

floating-power-MOSFET

driver.

A

dedicated

internal regulator (see figure 3) charges and

regulates the bootstrap capacitor voltage to ~5V.

When the voltage between the BST and SW

nodes drops below regulation, a PMOS pass

then to SW. The external circuit should provide

enough voltage headroom to facilitate charging.

bootstrap capacitor remains charged. When the

capacitor cannot charge. When the LS-FET is

charging. When there is no inductor current,

can charge the bootstrap capacitor. The floating

driver has its own UVLO protection, with a rising

threshold of 2.2V and hysteresis of 150mV. A

20Ω resistor placed between SW and BST cap is

strongly recommended to reduce SW spike

voltage.

.

Figure 3: Internal Bootstrap Charging Circuit

Startup and Shutdown

thresholds, the chip starts: The reference block

starts first, generating stable reference voltage

and currents, and then the internal regulator is

enabled. The regulator provides stable supply for

the remaining circuitries.

low, and thermal shutdown. In the shutdown

procedure, the signaling path is first blocked to

avoid any fault triggering. The COMP voltage and

the internal supply rail are then pulled down. The

floating driver is not subject to this shutdown

command.

Power Good

The MP4423 has power good (PG) output. The

PG pin is the open drain of a MOSFET. It should

be connected to VCC or some other voltage

source through a resistor (e.g. 100kΩ). In the

presence of an input voltage, the MOSFET turns

on so that the PG pin is pulled to low before SS

is pulled high after a delay, typically 90μs. When

Also, PG is pulled low if thermal shutdown or EN

is pulled low.