MP2148 Rev. 1.11

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18

5/25/2015

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For simplification, choose an input capacitor

with an RMS current rating greater than half of

the maximum load current.

The input capacitor can be electrolytic, tantalum

or ceramic. When using electrolytic or tantalum

capacitors, add a small and high quality

ceramic 0.1μF capacitor as close to the IC as

possible. When using ceramic capacitors, make

sure that they have enough capacitance to

provide sufficient charge to prevent excessive

voltage ripple at the input. The input voltage

ripple caused by capacitance can be estimated

as:

LOAD

OUT

OUT

IN

IN

SIN

IV

V

V1

fC1

V

V

⎛⎞

Δ=

×

× −

⎜⎟

×

⎝⎠

Selecting the Output Capacitor

The output capacitor (C2) stabilizes the DC

output

voltage.

Ceramic

capacitors

are

recommended.

Low

ESR

capacitors

are

preferred to limit the output voltage ripple.

Estimate the output voltage ripple as:

OUT

OUT

OUT

ESR

S1

IN

S

VV

1

V1

R

fL

V

8 f

C2

⎛⎞

⎛⎞

Δ=

× −

×

+

⎜⎟

⎜⎟

×× ×

⎝⎠ ⎝

⎠

equivalent series resistance (ESR) value of the

output capacitor.

When

using

ceramic

capacitors,

the

capacitance dominates the impedance at the

switching frequency, and causes most of the

output voltage ripple. For simplification, the

output voltage ripple can be estimated as:

OUT

OUT

OUT

2

S1

IN

VV

ΔV1

8f

L

C2

V

⎛⎞

=× −

⎜⎟

×× ×

⎝⎠

For tantalum or electrolytic capacitors, the ESR

dominates the impedance at the switching

frequency. For simplification, the output ripple

can be approximated as:

OUT

OUT

OUT

ESR

IN

S1

VV

ΔV1

R

fL

V

⎛⎞

=×

−

×

⎜⎟

×

⎝⎠

The characteristics of the output capacitor also

affect the stability of the regulation system.

PCB Layout

Proper layout of the switching power supplies is

very important, and sometimes critical for

proper

function.

For

the

high-frequency

switching converter, poor layout design can

result in poor line or load regulation and stability

issues.

Place the high-current paths (GND, IN and SW)

very close to the device with short, direct and

wide traces. The input capacitor needs to be as

close as possible to the IN and GND pins.

Place the external feedback resistors next to

the FB pin. Keep the switching node SW short

and away from the feedback network. Vout

sense line need as short as possible or keeps

away from power inductor, especial forbids

surrounding inductor. Figure11 is advised PCB

layout.

Figure 11: Two Ends of Input Decoupling

Capacitor Close to Pin 2 and Pin3.

.