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SC2449 датащи(PDF) 14 Page - Semtech Corporation |
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SC2449 датащи(HTML) 14 Page - Semtech Corporation |
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14 / 20 page ![]() 14 2002 Semtech Corp. www.semtech.com POWER MANAGEMENT SC2449 Electrical Characteristic Curves (Cont.) Start-up (Vin = 24V, Vout = 3.3V, Load Current = 5A/phase) ch1: Vout Theory of Operation The SC2449 employs a voltage mode control with feed forward to provide fast output response to load and line transients. The SC2449 has two outputs, which can be used to gen- erate two separate supply voltages or can be combined in bi-phase operation to generate one single supply volt- age. The internal reference is trimmed to 1 V with +/-1% accuracy, and the outputs voltages can be adjusted by two external resistors. In bi-phase operation, the dual switching regulators are operated 180° out of phase. Load current sharing between phases is normally re- quired, and this can be achieved by using precise feed- back voltage divider resistors (typically 0.1%) to match individual phase output voltage. In addition, small droop- ing resistors ( could be PCB traces) are employed at the output of each phase to enhance phase current balance. PWM Control Changes on the output voltages are fed to the inverting input of the Error Amplifiers, by the .B1 and .B2 pins, and compared with the internal 1 V reference. The com- pensation to the transconductance amplifier is achieved by connecting a capacitor in series with a resistor from the COMP1 and COMP2 pins to AGND respectively. The error signal from the error amplifier is compared to the saw tooth waveform by the PWM comparator, and Oscillator .requency Selection The sawtooth signal is generated by charging an internal capacitor with a current source. The charge current is set by an external resistor connected from the RRE. pin to AGND. The oscillator frequency and the external resis- tance follow an inversely proportional relationship. .eed .orward The SC2449 incorporates a voltage feed forward scheme to improve line transient immunity when changes of the input voltage occur. As the input voltage changes, the ramp valley to peak voltage of the internal oscillator fol- lows this change instantly. As a result the output voltage will have minimum disturbance due to the input line change. matched timing signal is generated to control the upper and lower gate drives of the two phases. A single Ramp signal is used to generate the control signals for both of phases, hence the maximum duty cycle is less than 50%. Synchronized Operation The internal oscillator can be synchronized to an exter- nal clock operating in the range of 270 kHz to 1 MHz. |
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