The DAC digital code controls each leg of the 14-bit

R-2R ladder. A code of 0x0 connects all legs of the lad-

der to REF-, corresponding to a DAC output voltage

approximately equal to REF+.

Further manipulation of the output voltage span is accom-

plished by offsetting DUTGND. The output voltage of the

MX7841 is described by the following equation:

where DATA is the numeric value of the DAC’s binary

input code, and DATA ranges from 0 to 16,383

1 LSB, is described by the following equation:

Reference Selection

Because the MX7841 has precision buffers on its refer-

ence inputs, the requirements for interfacing to these

inputs are minimal. Select a low-drift, low-noise refer-

ence within the recommended REF+ and REF- voltage

ranges. The MX7841 does not require bypass capaci-

tors on its reference inputs. Add capacitors only if the

reference voltage source requires them to meet system

specifications.

Minimizing Output Glitch

The MX7841’s internal deglitch circuitry is enabled on

the falling edge of LDAC. Therefore, to achieve opti-

mum performance, drive LDAC low after the inputs are

either latched or steady state. This is best accom-

plished by having the falling edge of LDAC occur at

least 50ns after the rising edge of CS.

Power Supplies, Grounding,

and Bypassing

For optimum performance, use a multilayer PC board

with an unbroken analog ground. For normal operation,

connect the four DUTGND pins directly to the ground

plane. Avoid sharing the connections of these sensitive

pins with other ground traces.

As with any sensitive data-acquisition system, connect

the digital and analog ground planes together at a sin-

gle point, preferably directly underneath the MX7841.

Avoid routing digital signals underneath the MX7841 to

minimize their coupling into the IC.

ceramic chip capacitors to the analog ground plane. To

enhance transient response and capacitive drive capa-

bility, add 10µF tantalum capacitors in parallel with the

ceramic capacitors. Note, however, that the MX7841

does not require the additional capacitance for stability.

digital ground plane.

Power-Supply Sequencing

To guarantee proper operation of the MX7841, ensure

ground. To prevent this situation, connect a Schottky

shown in Figure 3. Do not power up the logic input pins

LSB

REF

REF

=

+−

−

()

2

2

14

V

2 V

V

DATA

2

V

V

OUT

REF

REF

14

REF

DUTGND

=−

()

+













−

+−

−

Octal, 14-Bit Voltage-Output DAC

with Parallel Interface

______________________________________________________________________________________

11

Note: Output voltage is based on REF+ = +5V, REF- = -5V, and

DUTGND = 0.

GND

SYSTEM GND

1N5817

MX7839

Table 3. Analog Voltage vs. Digital Code

INPUT CODE

OUTPUT

VOLTAGE (V)

11 1111 1111 1111

+9.998779

10 0000 0000 0000

0

01 0011 1011 0010

-3.845215

00 0000 0000 0001

-9.998779

00 0000 0000 0000

-10