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RD-0608

The bootstrap diode should be a fast recovery, if not an ultrafast recovery component to maintain good efficiency.

Since the cathode of the bootstrap diode will be switching between COM and VBUS + 14V, the reverse recovery

time of this diode is of critical importance. For additional information concerning the bootstrap components, refer to

Support.

8. Enable Pin

The enable pin can be used for dimming or open-circuit protection. When the ENN pin is held low the IRS2540

remains in a fully functional state with no alterations to the operating environment. To disable the control feedback

and regulation a voltage greater than VENTH (approximately 2.5V) needs to be applied to the ENN pin. With the

chip in a disabled state the HO output will remain low and the LO output will remain high to prevent VS from

floating, in addition to maintaining charge on the bootstrap capacitor if a MOSFET is used for the lower switch.

The threshold for disabling the IRS2540/1/01/11 has been set to 2.5V to enhance immunity to any externally

generated noise or application ground noise and also makes it possible receive a drive signal from a microcontroller.

Dimming Mode

To achieve dimming a signal with constant frequency and set duty cycle can be fed into the ENN pin. There is a

direct linear relationship between the average load current and duty cycle if no output capacitor is used in the circuit.

A large output capacitor tends to increase the minimum dim level because some current continues to supply the

LEDs from this capacitor during the off phase of the PWM dimming. With no output capacitor, if the ratio is 50%

then 50% of the maximum set light output will be emitted. Similarly if the ratio is 30% then 70% of the maximum

set light output will be realized. A sufficiently high frequency of the dimming signal must be chosen to avoid

visible flashing or “strobe light” effect. A signal around 1kHz from zero to 5V is recommended. For this evaluation

board, a fully adjustable (0% to 100% duty cycle) PWM wave generator is suggested but this is not included as part

of the evaluation board. The following circuit is a simple enable pin dimming signal generator.

1

2

3

4

8

7

6

5

OUT1

GND

IN1(+)

IN2(+)

IN2(-)

OUT2

VCC

IN1(-)

VR1

CVCC3

CVCC4

DEN2

R1

R2

R3

R4

R5

R6

C1

C2

COM

VBUS

IC2

RS

Out to

ENN pin

R7

Fig. 22 Suggested PWM Driver (not included in IRPLLED1.5X2)

If an external supply for VCC is used, the minimum amount of dimming achievable (light output approaches 0%)

will be determined by the “on” time of the HO output, when in a fully functional regulating state. To maintain

reliable dimming, it is recommended to keep the “off” time of the enable signal at least 10 times that of the HO “on”

time. For example, if the application is running at 75kHz with an input voltage of 100V and an output voltage of

20V, the HO “on” time will be 2.7µs (one-fourth of the period – see calculations below) according to standard buck

topology theory. This will set the minimum “off” time of the enable signal to 27µs.