74LVC1G175 datasheet(9/17 Pages) PHILIPS

9 / 17 page

9397 750 13762

Product data sheet

Rev. 01 — 18 October 2004

9 of 17

Philips Semiconductors

74LVC1G175

Single D-type ﬂip-ﬂop with reset; positive-edge trigger

[1]

All typical values are measured at Tamb = 25 °C.

[2]

These typical values are measured at VCC = 3.3 V.

[3]

CPD is used to determine the dynamic power dissipation (PD in µW).

PD =CPD × VCC2 × fi × N+ Σ(CL × VCC2 × fo) where:

fi = input frequency in MHz;

fo = output frequency in MHz;

CL = output load capacitance in pF;

VCC = supply voltage in Volts;

N = number of inputs switching;

Σ(C

L × VCC

× f

o) = sum of the outputs.

[4]

The condition is VI = GND to VCC.

trem

removal time master reset

see Figure 7

VCC = 1.65 V to 1.95 V

1.9

VCC = 2.3 V to 2.7 V

1.4

VCC = 2.7 V

1.3

VCC = 3.0 V to 3.6 V

1.2

VCC = 4.5 V to 5.5 V

1.0

tsu

set-up time D to CP

see Figure 6

VCC = 1.65 V to 1.95 V

2.9

VCC = 2.3 V to 2.7 V

1.7

VCC = 2.7 V

1.7

VCC = 3.0 V to 3.6 V

1.3

VCC = 4.5 V to 5.5 V

1.1

hold time D to CP

see Figure 6

VCC = 1.65 V to 1.95 V

0.0

VCC = 2.3 V to 2.7 V

0.3

VCC = 2.7 V

0.5

VCC = 3.0 V to 3.6 V

1.2

VCC = 4.5 V to 5.5 V

0.5

fmax

maximum clock pulse

frequency

see Figure 6

VCC = 1.65 V to 1.95 V

MHz

VCC = 2.3 V to 2.7 V

175

MHz

VCC = 2.7 V

175

MHz

VCC = 3.0 V to 3.6 V

175

MHz

VCC = 4.5 V to 5.5 V

200

MHz

Table 8:

Dynamic characteristics …continued

GND = 0 V; see Figure 8

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

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