Pad Coordinates

Unit:

mm

Pad No.

X

Y

Pad No.

X

Y

1

-962.50

600.00

23

834.10

-754.00

2

-962.50

495.00

24

834.10

-652.60

3

-962.50

380.20

25

834.10

-551.20

4

-962.50

275.20

26

834.10

-449.80

5

-962.50

-107.20

27

834.10

-348.40

6

-962.50

-235.60

28

834.10

-247.00

7

-962.50

-366.00

29

834.10

-145.60

8

-962.50

-471.00

30

987.30

0.50

9

-962.50

-576.00

31

987.30

130.50

10

-962.50

-681.00

32

987.30

382.05

11

-962.50

-786.00

33

987.30

734.05

12

-689.60

-772.45

34

610.30

594.40

13

-460.45

-595.30

35

508.90

594.40

14

-344.25

-595.30

36

407.50

594.40

15

-242.85

-595.30

37

306.10

594.40

16

-141.45

-595.30

38

204.70

594.40

17

-40.05

-595.30

39

103.30

594.40

18

61.35

-595.30

40

1.90

594.40

19

162.75

-595.30

41

-99.50

594.40

20

264.15

-595.30

42

-200.90

594.40

21

365.55

-595.30

43

-317.10

594.40

22

466.95

-595.30

44

-624.50

756.80

Pin Description

Pin No.

Pin Name

I/O

Description

1~4

LED3~LED0

O

LED driver output ports. This is a CMOS output pin and maximum driving

current up to +20mA.

5

OSC

I

Connected to an external resistor or an RC oscillator circuit.

6DO

O

Data output pin, output serial data at falling edge of shift clock, starting from

the lower bit. This is N-ch open-drain output pin.

7DI

I

Data input pin, input serial data at rising edge of shift clock, starting from the

lower bit.

8

CLK

I

Clock input pin. Reads serial data at the rising edge, and outputs data at the

falling edge.

9CS

I

Initializes serial interface at the rising or falling edge of the HT16515. Then

it waits to receive a command. Data input after CS has fallen is processed,

current processing is stopped, and the serial interface is initialized. While

CS is high, CLK is ignored.

10, 11

Key0, Key1

I

Key-in data input to these pins are latched at the end of the display cycle.

12, 44

VSS

¾ Negative power supply, ground

13, 43

VDD

¾ Positive power supply

14~29

Seg1/KS1~Seg16/KS16

O

High voltage output, segment output pins, dual function as key source. This

is PMOS open-drain and pull-low resistor output.

30

VEE

¾ VFD power supply

31~38

Seg17/Grid12~

Seg24/Grid5

O

High voltage output, these pins are selectable for segment or grid output.

This is PMOS open-drain and pull-low resistor output.

39~42

Grid4~Grid1

O

High voltage output, grids output pin. This is PMOS open-drain and pull-low

resistor output.

HT16515

Rev. 1.00

3

December 19, 2003