5220-DS02-R datasheet(58/90 Pages) BOARDCOM

58 / 90 page

BCM5220

Preliminary Data Sheet

04/20/04

Broa d c om Co rp o r a t i o n

Page 46

Auxiliary Control/Status Register

Document

5220-DS04-405-R

INTERRUPT REGISTER

FDX LED Enable

When this bit is set to a 1, FDX LED pin G7(BGA)/34(PQFP) will output FDX status. Otherwise, when INTR Enable is set to

a 1 it will output Interrupt state. When both bits are 0, it will output XMT state.

Interrupt Enable

Setting this bit enables Interrupt Mode.

FDX Mask

When this bit is set, changes in Duplex mode will not generate an interrupt.

SPD Mask

When this bit is set, changes in operating speed will not generate an interrupt.

Link Mask

When this bit is set, changes in Link status will not generate an interrupt.

Table 25: Interrupt Register (Address 26d, 1Ah)

BIt

Name

R/W

Description

Default

FDX LED Enable

R/W

1 = Enable full-duplex LED output on G7/34

0 = Enable XMTLED or Interrupt LED if

Interrupt is enabled.

INTR Enable

R/W

Interrupt enable

13:12

Reserveda

a. Preserve existing values of reserved bits by completing a “Read/Modify Write.”

Ignore when read

FDX Mask

R/W

Full-duplex interrupt mask

SPD Mask

R/W

SPEED interrupt mask

LINK Mask

R/W

LINK interrupt mask

INTR Mask

R/W

Master interrupt mask

7:4

Reserved

Ignore when read

000

FDX Change

Duplex change interrupt

SPD Change

Speed change interrupt

LINK Change

Link change interrupt

INTR Status

Interrupt status

Notes: R/W = Read/Write, RO = Read only, SC = Self Clear, LL = Latched Low, LH = Latched High, LL & LH Clear after

read operation. Use default values of reserved bit(s) when writing to reserved bit(s).

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