MB90387 datasheet(2/82 Pages) CYPRESS

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MB90387/387S/F387/F387S

MB90V495G

16-bit Microcontrollers

F2MC-16LX MB90385 Series

Cypress Semiconductor Corporation

•

198 Champion Court

•

San Jose

, CA 95134-1709

•

408-943-2600

Document Number: 002-07765 Rev. *A

Revised February 5, 2018

MB90385 series devices are general-purpose high-performance 16-bit micro controllers designed for process control of consumer

products, which require high-speed real-time processing. The devices of this series have the built-in full-CAN interface.

The system, inheriting the architecture of F2MC family, employs additional instruction ready for high-level languages, expanded

addressing mode, enhanced multiply-divide instructions, and enriched bit-processing instructions. Furthermore, employment of 32-

bit accumulator achieves processing of long-word data (32 bits).

The peripheral resources of MB90385 series include the following:

8/10-bit A/D converter, UART (SCI), 8/16-bit PPG timer, 16-bit input-output timer (16-bit free-run timer, input capture 0, 1, 2, 3 (ICU)),

and CAN controller.

Features

Clock

■ Built-in PLL clock frequency multiplication circuit

■ Selection of machine clocks (PLL clocks) is allowed among

frequency division by two on oscillation clock, and multiplication

of 1 to 4 times of oscillation clock (for 4-MHz oscillation clock,

4 MHz to 16 MHz).

■ Operation by sub-clock (8.192 kHz) is allowed. (MB90387,

MB90F387)

■ Minimum execution time of instruction: 62.5 ns (when operating

with 4-MHz oscillation clock, and 4-time multiplied PLL clock).

16 Mbyte CPU memory Space

■ 24-bit internal addressing

Instruction System Best Suited to Controller

■ Wide choice of data types (bit, byte, word, and long word)

■ Wide choice of addressing modes (23 types)

■ Enhanced multiply-divide instructions and RETI instructions

■ Enhanced high-precision computing with 32-bit accumulator

Instruction System Compatible with High-level

Language (C language) and Multitask

■ Employing system stack pointer

■ Enhanced various pointer indirect instructions

■ Barrel shift instructions

Increased Processing Speed

■ 4-byte instruction queue

Powerful Interrupt Function with 8 Levels and 34

Factors

Automatic Data Transfer Function Independent of CPU

■ Expanded intelligent I/O service function (EI2 OS): Maximum

of 16 channels

Low Power Consumption (standby) Mode

■ Sleep mode (a mode that halts CPU operating clock)

■ Time-base timer mode (a mode that operates oscillation clock,

sub clock, time-base timer and watch timer only)

■ Watch mode (a mode that operates sub clock and watch timer

only)

■ Stop mode (a mode that stops oscillation clock and sub clock)

■ CPU blocking operation mode

Process

■ CMOS technology

I/O Port

■ General-purpose input/output port (CMOS output):

MB90387, MB90F387: 34 ports (including 4 high-current out-

put ports)

MB90387S, MB90F387S: 36 ports (including 4 high-current

output ports)

Timer

■ Time-base timer, watch timer, watchdog timer: 1 channel

■ 8/16-bit PPG timer: 8-bit x 4 channels, or 16-bit x 2 channels

■ 16-bit reload timer: 2 channels

■ 16-bit input/output timer

❐ 16-bit free run timer: 1 channel

❐ 16-bit input capture: (ICU): 4 channels

Interrupt request is issued upon latching a count value of 16-

bit free run timer by detection of an edge on pin input.

CAN Controller: 1 channel

■ Compliant with Ver2.0A and Ver2.0B CAN specifications

■ 8 built-in message buffers

■ Transmission rate of 10 kbps to 1 Mbps (by 16 MHz machine

clock)

■ CAN wake-up

UART (SCI): 1 channel

■ Equipped with full-duplex double buffer

■ Clock-asynchronous or clock-synchronous serial transmission

is available.

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