MB91F469GA datasheet(2/147 Pages) CYPRESS

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MB91F469GA/F469GB

FR60 MB91460G Series,

32-bit Microcontroller Datasheet

Cypress Semiconductor Corporation

•

198 Champion Court

•

San Jose

, CA 95134-1709

•

408-943-2600

Document Number: 002-04606 Rev. *A

Revised April 20, 2016

MB91460G series is a line of general-purpose 32-bit RISC microcontrollers designed for embedded control applications which

require high-speed real-time processing, such as consumer devices and on-board vehicle systems. This series uses the FR60 CPU,

which is compatible with the FR family of CPUs.

This series contains the LIN-USART and CAN controllers.

Features

FR60 CPU core

■ 32-bit RISC, load/store architecture, five-stage pipeline

■ 16-bit fixed-length instructions (basic instructions)

■ Instruction execution speed: 1 instruction per cycle

■ Instructions including memory-to-memory transfer, bit manip-

ulation, and barrel shift instructions: Instructions suitable for

embedded applications

■ Function entry/exit instructions and register data multi-load

store instructions: Instructions supporting C language

■ Register interlock function: Facilitating assembly-language

coding

■ Built-in multiplier with instruction-level support

Signed 32-bit multiplication: 5 cycles

Signed 16-bit multiplication: 3 cycles

■ Interrupts (save PC/PS): 6 cycles (16 priority levels)

■ Harvard architecture enabling program access and data

access to be performed simultaneously

■ Instructions compatible with the FR family

Internal Peripheral Resources

■ General-purpose ports : Maximum 205 ports

■ DMAC (DMA Controller)

Maximum of 5 channels able to operate simultaneously

(including 2 external channels)

3 transfer sources (external pin/internal peripheral/software)

Activation source can be selected using software

Addressing mode specifies full 32-bit addresses

(increment/decrement/fixed)

Transfer mode (demand transfer/burst transfer/step

transfer/block transfer)

Fly-by transfer support (between external I/O and memory)

Transfer data size selectable from 8/16/32-bit

Multi-byte transfer enabled (by software)

DMAC descriptor in I/O areas (200H to 240H, 1000H to 1024H)

■ A/D converter (successive approximation type)

10-bit resolution: 32 channels

Conversion time: minimum 1

s

■ External interrupt inputs : 16 channels

12 channels shared with CAN RX, I2C SDA or I2C SCL pins

■ Bit search module (for REALOS)

Function to search from the MSB (most significant bit) for the

position of the first “0”, “1”, or changed bit in a word

■ LIN-USART (full duplex double buffer): 8 channels, 4 channels

with FIFO

Clock synchronous/asynchronous selectable

Sync-break detection

Internal dedicated baud rate generator

■ I2C bus interface (supports 400 kbps): 4 channel

■ Master/slave transmission and reception

■ Arbitration function, clock synchronization function

■ CAN controller (C-CAN): 6 channels

■ Maximum transfer speed: 1 Mbps

■ 128 transmission/reception message buffers

■ Sound generator: 1 channelTone frequency: PWM frequency

divide-by-two (reload value + 1)

■ Alarm comparator: 2 channelsMonitor external voltage

Generate an interrupt in case of voltage lower/higher than the

defined thresholds (reference voltage)

■ 16-bit PPG timer: 16 channels

■ 16-bit PFM timer: 1 channel

■ 16-bit reload timer: 8 channels

■ 16-bit free-run timer: 8 channels (1 channel each for ICU and

OCU)

■ Input capture: 8 channels (operates in conjunction with the

free-run timer)

■ Output compare: 8 channels (operates in conjunction with the

free-run timer)

■ Up/Down counter: 4 channels (4*8-bit or 2*16-bit)

■ Watchdog timer

■ Real-time clock

■ Low-power consumption modes: Sleep/stop mode function

■ Low voltage detection circuit

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