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Issue A

LANSDALE Semiconductor, Inc.

ML145488

Abort

The function of prematurely terminating a data frame is called

an abort. The transmitter aborts a frame by sending between seven

and fourteen consecutive 1s. When the receiver detects an abort

character, it responds by clearing the FIFO and clearing the buffer

in memory. It then begins searching for a new frame.

In–Frame, Inter–Frame Time Fill, and Idle

For LAPB and other applications, there are three states that the

data link may be in: in–frame, inter–frame time fill, and idle.

In–frame is the period from the beginning of an opening flag and

the end of a closing flag. Inter–frame time fill is the period

between frames when continuous flags are transmitted. Idle is an

out–of–frame period when continuous 1s are on the link. In

LAPD, on the D channel, there are only two states: in–frame and

idle. Continuous flags are not transmitted between frames.

BLOCK DIAGRAM DESCRIPTION

This section is a brief overview of the internal blocks of the

DDLC. The blocks include two protocol controllers that handle

the bit–level aspects of HDLC–like packet protocols and four

FIFOs that buffer the data, a four–channel DMA controller, and a

microprocessor interface block that connects the DDLC to the

host system. Figure 3 is a simplified block diagram of the DDLC.

While the DDLC has two data transceivers, only one is shown for

simplicity.

TRANSMIT BIT HANDLER

Two identical bit–level protocol transmitters are provided which

perform HDLC–type framing. This section describes the opera-

tion of only one transmitter, but it applies to both.

Packet Operation

The transmitter is designed to operate with as little intervention

from the host processor as possible. To transmit a frame of data,

the host merely informs the DDLC of the starting address of the

data frame in memory and the length of the frame in bytes. The

DDLC then transmits an opening flag and the data (LSB first)

from memory. When the transmitter detects that the end of the

data buffer has been reached, a CRC field and a closing flag are

appended. The transmitter generates an abort character if the

FIFO underruns. During inter–frame periods, the DDLC can be

configured to transmit either continuous flags (7E hex) or contin-

uous marks (FF hex).

State Diagram

Figure 2 is the state diagram for the transmitter in packet operation.

Abort

The DDLC can be configured to transmit a standard HDLC

abort character. It can also transmit an abort character which is

compatible with DMI 3.1 modes 2 or 3 for restricted B–channel

applications. An abort character will be transmitted when the TX

FIFO underruns, when the Force Abort bit is set in the Transmit

Control Register, or when the CTS pin is deasserted.

Flow Control Mechanisms

The DDLC provides two flow control mechanisms: one for basic

rate ISDN applications and the other for standard modem applications.

The following paragraphs describe the operation of the two schemes.

ISDN D Channel Contention

When the DDLC is operating on the D channel with the compan-

ion MC145474 S/T transceiver, the DREQ and DGRNT lines must

be used to comply with the basic rate D channel contention algo-

rithm. When the DDLC has a data frame to transmit, it asserts

DREQ (high). When DGRNT is detected high from the MC145474

transmission from the DDLC begins in the IDL D–bit time slots

when DREQ and DGRNT are both active. If DGRNT is deasserted

(goes low) in the middle of a frame, the DDLC automatically

aborts the frame in progress and prepares to retransmit the entire

frame when the D channel becomes available again. This is done

without interrupting the host.

Modem Flow Control

The transmitter indicates to a modem that it has data ready to

transmit with signals similar to D channel operation. In this mode,

Request–To–Send (RTS) is directly controlled by theTransmit

Enable (TE) bit. When TE is high, the RTS pin is asserted (low).

During inter–frame periods, either flags or

DATA READY OR

FLAG IDLE

IDLE

FLAG SENT AND

DATA READY

SEND

FLAG

1

SEND

DATA

END OF DATA

SEND

CRC

NO

DATA

CRC SENT

SEND

FLAG

2

ABORT

SENT

ABORT

ABORT

ABORT OR

NO CTS

ABORT OR

NO CTS OR

FIFO UNDERRUN

ABORT OR

NO CTS

ABORT OR

NO CTS

Figure 2. Transmitter State Diagram

HDLC Operation