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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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ML145162 датащи(PDF) 13 Page - LANSDALE Semiconductor Inc. |
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ML145162 датащи(HTML) 13 Page - LANSDALE Semiconductor Inc. |
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13 / 24 page  www.lansdale.com Page 13 of 24 Issue 0 Figure 17. TxPS/fTx and RxPS/fRx Outputs to Control Power Switches of the Transmitter and the Receiver Q Q POWER SWITCH FOR TRANSMITTER VDD UNIVERSAL DUAL PLL RxPS/fRx TxPS/fTx POWER SUPPLY Tx POWER AMP Tx DIVIDER CHAIN COUNTER, PHASE DETECTOR Tx POWER–DOWN ENABLE FLAG Rx DIVIDER CHAIN COUNTER, PHASE DETECTOR Rx POWER–DOWN ENABLE FLAG VDD TO CONTROL THE RECEIVER POWER SWITCH POWER SAVING OPERATION This PLL has a programmable power–saving scheme. The transmit and receive counters and the reference frequency counter can be powered down individually by setting the TxPD enable, RxPD enable, and Ref PD enable bits of the control register. The functions of the power down control bits are explained in Table 2 and the programming format is in Figure 8. The output pins TxPS/fTx and RxPS/fRx output the status of the internal power saving setting. If the bit TxPD enable is set “high” (transmit counter is set to power–down mode), then the TxPS/fTx pin will also output a “high” state. This TxPS/fTx out-put can control an external power switch to switch off the transmitter, as shown in Figure 17. This scheme can be applied to the RxPS/fRx output to control the receiver power saving operation as required. LANSDALE Semiconductor, Inc. ML145162 |
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