CY28329

..................... Document #: 38-07040 Rev. *E Page 15 of 16

Test Circuit

Note: All capacitors must be placed as close to the pins as is physically possible.

4, 9, 15, 20, 31, 36, 41, 47

VDD_REF, VDD_PCI,

OUTPUTS

CY28329

Note: Each supply pin must have an individual decoupling capacitor.

VDD_3V66, VDD_CORE

VDD_48 MHz, VDD_CPU

Test

Nodes

CPU

Ref,USB Outputs

PCI,3V66 Outputs

30 pF

20 pF

Test Node

Test Node

1, 8, 14, 19,32,37, 46, 50

Ordering Information

Ordering Code

Package Type

Operating Range

Standard

CY28329PVC

56-Pin Small Shrunk Outline Package (SSOP)

Commercial

CY28329PVCT

56-Pin Small Shrunk Outline Package (SSOP) - Tape and Reel

Commercial

CY28329ZC

56-Pin Thin Small Shrunk Outline Package (TSSOP)

Commercial

CY28329ZCT

56-Pin Thin Small Shrunk Outline Package (TSSOP) - Tape and Reel Commercial

Lead-free

CY28329OXC

56-Pin Small Shrunk Outline Package (SSOP)

Commercial

CY28329OXCT

56-Pin Small Shrunk Outline Package (SSOP) -Tape and Reel

Commercial

CY28329ZXC

56-Pin Thin Small Shrunk Outline Package (TSSOP)

Commercial

CY28329ZXCT

56-Pin Thin Small Shrunk Outline Package (TSSOP)

Commercial