2004 Mar 22

7

Philips Semiconductors

Product specification

Quad 2-input NAND gate (open drain)

74LVC38A

AC CHARACTERISTICS

Notes

3. Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed

by design.

SYMBOL

PARAMETER

TEST CONDITIONS

MIN.

TYP

MAX.

UNIT

WAVEFORMS

propagation delay nA, nB to nY

see Figs 6 and 7

1.2

−

5.7

−

ns

2.7

0.5

1.7

2.9

ns

3.0 to 3.6

0.5

1.7(2)

3.0

ns

propagation delay nA, nB to nY

see Figs 6 and 7

1.2

−

4.8

−

ns

2.7

1.0

2.6

3.8

ns

3.0 to 3.6

1.0

2.3(2)

3.6

ns

skew

note 3

−−

1.0

ns

propagation delay nA, nB to nY

see Figs 6 and 7

1.2

−−−

ns

2.7

0.5

−

4.0

ns

3.0 to 3.6

0.5

−

4.0

ns

propagation delay nA, nB to nY

see Figs 6 and 7

1.2

−−−

ns

2.7

1.0

−

5.0

ns

3.0 to 3.6

1.0

−

4.5

ns

skew

note 3

−−

1.5

ns