MPC9449

MOTOROLA

2

Figure 1. MPC9449 Logic Diagram

Figure 2. MPC9449 52–Lead Package Pinout (Top View)

NC

VCC

QB2

GND

QB1

VCC

QB0

GND

GND

QA1

VCC

QA0

GND

NC

VCC

QD4

GND

QD3

VCC

QD2

GND

QD1

VCC

QD0

GND

NC

40

41

42

43

44

45

46

47

48

49

50

51

52

25

24

23

22

21

20

19

18

17

16

15

14

123

456789

10 11 12 13

39 38 37 36 35 34 33 32 31 30 29 28 27

26

MPC9449

÷2

÷1

VCC

VCC

CCLK0

CCLK1

PCLK

PCLK

PCLK_SEL

QA0

DSELB

DSELC

MR/OE

DSELD

DSELA

QA1

QB0

QB1

QB2

QC0

QC1

QC2

QC3

QD0

QD1

QD2

QD3

QD4

QD5

CCLK_SEL

0

1

0

1

0

1

0

1

0

1

0

1

Table 1: FUNCTION TABLE

Control

Default

0

1

PCLK_SEL

0

LVCMOS clock input selected (CCLK0 or CCLK1)

PCLK differential input selected

CCLK_SEL

0

CCLK0 selected

CCLK1 selected

DSELA, DSELB,

DSELC, DSELD

0 0

0 0

÷1

÷2

MR/OE

1

Outputs enabled

Outputs disabled (high impedance)

Table 2: PIN CONFIGURATION

Pin

I/O

Type

Function

PCLK, PCLK

Input

LVPECL

Differential LVPECL clock input

CCLK0, CCLK1

Input

LVCMOS

LVCMOS clock inputs

PCLK_SEL

Input

LVCMOS

LVPECL clock input select

CCLK_SEL

Input

LVCMOS

LVCMOS clock input select

DSELA, DSELB, DSELC, DSELD

Input

LVCMOS

Clock divider selection

MR/OE

Input

LVCMOS

Output enable/disable (high-impedance tristate)

QA0-1, QB0-2, QC0-3, QD0-5

Output

LVCMOS

Clock outputs

GND

Supply

Ground

Negative power supply (GND)

VCC

Supply

VCC

Positive power supply for I/O and core. All VCC pins must be connected to

the positive power supply for correct operation

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com