VITESSE

SEMICONDUCTOR CORPORATION

G52069-0, Rev 4.3

Page 3

05/11/01

© VITESSE SEMICONDUCTOR CORPORATION • 741 Calle Plano • Camarillo, CA 93012

Tel: (800) VITESSE • FAX: (805) 987-5896 • Email: prodinfo@vitesse.com

Internet: www.vitesse.com

Data Sheet

VSC8061/VSC8062

Multiplexer/Demultiplexer Chipset

2.5Gb/s 16-Bit

Figure 3: VSC8061 Multiplexer Waveforms

Table 1: VSC8061 AC Characteristics

NOTE: (1) Devices are guaranteed to operate to a maximum frequency of 2.5GHz.

Parameter

Description

Min

Typ

Max

Units

Conditions

400

ps

6.4

15.6

ns

Parallel data set-up time with respect to CLK16

falling edge

2.0

ns

Data hold time with respect to CLK16 falling

edge

0.5

ns

CLK16 duty cycle

40

60

%

DCLK (DCLKN) rise and fall times

1.5

ns

10% to 90%

D[0:15] rise and fall times

2.0

ns

10% to 90%

CLK16 (CLK16N) rise and fall times

0.5

1.0

ns

10% to 90%

DO (DON) rise and fall times

150

165

ps

20% to 80%

VALID DATA (1)

VALID DATA (2)

D0

D1 D2

D3 D4

D5 D6 D7 D8

D9 D10 D11 D12 D13 D14 D15

High-speed differential clock input

Parallel data clock output

Parallel data inputs

Parallel data clock input

High-speed differential serial data output

CLK (CLKN)

CLK16 (CLK16N)

D[0:15]

DCLK (DCLKN)

DO (DON)

Serialized Data

NOTE:

=Don’t care