ADAS1000-1BCPZ datasheet(47/80 Pages) AD

47 / 80 page

Data Sheet

ADAS1000/ADAS1000-1/ADAS1000-2

Rev. B | Page 47 of 80

VOLTAGE REFERENCE

The ADAS1000/ADAS1000-1/ADAS1000-2 have a high

performance, low noise, on-chip 1.8 V reference for use in

the ADC and DAC circuits. The REFOUT of one device is

intended to drive the REFIN of the same device. The internal

reference is not intended to drive significant external current;

for optimum performance in gang operation with multiple

devices, each device should use its own internal reference.

An external 1.8 V reference can be used to provide the

required VREF. In such cases, there is an internal buffer pro-

vided for use with external reference. The REFIN pin is a

dynamic load with an average input current of approximately

100 μA per enabled channel, including respiration. When

the internal reference is used, the REFOUT pin requires

decoupling with a10 μF capacitor with low ESR (0.2 Ω

maximum) in parallel with 0.01 μF capacitor to REFGND,

these capacitors should be placed as close to the device pins

as possible and on the same side of the PCB as the device.

GANG MODE OPERATION

While a single ADAS1000 or ADAS1000-1 provides the ECG

channels to support a five-electrode and one-RLD electrode

(or up to 8-lead) system, the device has also been designed so

that it can easily extend to larger systems by paralleling up

multiple devices. In this mode of operation, an ADAS1000 or

ADAS1000-1 master device can easily be operated with one

or more ADAS1000-2 slave devices. In such a configuration,

one of the devices (ADAS1000 or ADAS1000-1) is designated

as master, and any others are designated as slaves. It is

important that the multiple devices operate well together;

with this in mind, the pertinent inputs/outputs to interface

between master and slave devices have been made available.

Note that when using multiple devices, the user must collect

the ECG data directly from each device. If using a traditional

12-lead arrangement where the Vx leads are measured relative to

WCT, the user must configure the ADAS1000 or ADAS1000-1

master device in lead mode with the slave ADAS1000-2

device configured for electrode mode. The LSB size for

electrode and lead data differs (see Table 43 for details).

In gang mode, all devices must be operated in the same

power mode (either high performance or low power) and

the same data rate.

Master/Slave

The ADAS1000 or ADAS1000-1 can be configured as a

master or slave, while the ADAS1000-2 can only be config-

ured as a slave. A device is selected as a master or slave using

Bit 5, master, in the ECGCTL register (see Table 28). Gang

mode is enabled by setting Bit 4, gang, in the same register.

When a device is configured as a master, the SYNC_GANG

pin is automatically set as an output.

When a device is configured as a slave (ADAS1000-2), the

SYNC_GANG and CLK_IO pins are set as inputs.

Synchronizing Devices

The ganged devices need to share a common clock to ensure

that conversions are synchronized. One approach is to drive

the slave CLK_IO pins from the master CLK_IO pin. Alter-

natively, an external 8.192 MHz clock can be used to drive

the CLK_IO pins of all devices. The CLK_IO powers up high

impedance until configured in gang mode.

In addition, the SYNC_GANG pin is used to synchronize

the start of the ADC conversion across multiple devices. The

SYNC_GANG pin is automatically driven by the master and

is an input to all the slaves. SYNC_GANG is in high

impedance until enabled via gang mode.

When connecting devices in gang mode, the SYNC_GANG

output is triggered once when the master device starts to convert.

Therefore, to ensure that the slave device or devices receive this

synchronization signal, configure the slave device first for oper-

ation and enable conversions, followed by issuing the conversion

signal to the ECGCTL register in the master device.

Figure 76. Master/Slave Connections in Gang Mode, Using Multiple

ADAS1000/ADAS1000-1/ADAS1000-2 Devices

Calibration

The calibration DAC signal from one device (master) can be

output on the CAL_DAC_IO pin and used as the calibration

input for other devices (slaves) when used in the gang mode

of operation. This ensures that they are all being calibrated

using the same signal which results in better matching across

channels. This does not happen automatically in gang mode

but, rather, must be configured via Table 36.

MASTER

CLK_OI

SYNC_GANG

CM_OUT

CAL_DAC_IO

CLK_IO

SYNC_GANG

CM_IN

CAL_DAC_IO

SYNC_GANG

CM_IN

SLAVE 0

SLAVE 1

CAL_DAC_IO

CLK_IO

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