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AD7294BCPZRL датащи(PDF) 26 Page - Analog Devices |
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AD7294BCPZRL датащи(HTML) 26 Page - Analog Devices |
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26 / 48 page ![]() Data Sheet AD7294 Rev. I | Page 25 of 47 Series Resistance Cancellation The AD7294 has been designed to automatically cancel out the effect of parasitic, base, and collector resistance on the tempera- ture reading. This gives a more accurate result, without the need for any user characterization of the parasitic resistance. The AD7294 can compensate for up to 100 Ω in a process that is transparent to the user. DAC OPERATION The AD7294 contains four 12-bit DACs that provide digital control with 12 bits of resolution with a 2.5 V internal reference. The DAC core is a thin film 12-bit string DAC with a 5 V output span and an output buffer that can drive the high voltage output stage. The DAC has a span of 0 V to 5 V with a 2.5 V reference input. The output range of the DAC, which is controlled by the offset input, can be positioned from 0 V to 15 V. Resistor String The resistor string structure is shown in Figure 48. It consists of a string of 2n resistors, each of Value R. The code loaded to the DAC register determines at which node on the string the voltage is tapped off to be fed into the output amplifier. The voltage is tapped off by closing one of the switches connecting the string to the amplifier. This architecture is inherently monotonic, voltage out, and low glitch. It is also linear because all of the resistors are of equal value. R R R R R TO OUTPUT AMPLIFIER Figure 48. Resistor String Structure Output Amplifier Referring to Figure 48, the purpose of A1 is to buffer the DAC output range from 0 V to VREF. The second amplifier, A2, is configured such that when an offset is applied to OFFSET IN x, its output voltage is three times the offset voltage minus twice the DAC voltage. VOUT = 3VOFFSET − 2VDAC The DAC word is digitally inverted on-chip such that VOUT = 3VOFFSET + 2(VDAC − VREF) and VDAC = × n REF D V 2 where: VDAC is the output of the DAC before digital inversion. D is the decimal equivalent of the binary code that is loaded to the DAC register. n is the bit resolution of the DAC. An example of the offset function is given in Table 8. Table 8. Offset Voltage Function Example Offset Voltage VOUT with 0x000 VOUT with 0xFFF 1.67 V 0 V 5 V − 1 LSB 3.33 V 5 V 10 V − 1 LSB 5.00 V 10 V 15 V − 1 LSB The user has the option of leaving the offset pin open, in which case the voltage on the noninverting input of Op Amp A2 is set by the resistor divider, giving VOUT = 2VDAC This generates the 5 V output span from a 2.5 V reference. Digitally inverting the DAC allows the circuit to operate as a generic DAC when no offset is applied. If the offset pin is not being driven, it is best practice to place a 100 nF capacitor between the pin and ground to improve both the settling time and the noise performance of the DAC. Note that a significant amount of power can be dissipated in the DAC outputs. A thermal shutdown circuit sets the DAC outputs to high impedance if a die temperature of >150°C is measured by the internal temperature sensor. This also sets the overtem- perature alert bit in Alert Register C, see the Alerts and Limits Theory section. Note that this feature is disabled when the temperature sensor powers down. ADC AND DAC REFERENCE The AD7294 has two independent internal high performance 2.5 V references, one for the ADCs and the other for the four on-chip DACs. If the application requires an external reference, it can be applied to the REFOUT/REFIN DAC pin and/or to the REFOUT/REFIN ADC pin. The internal reference should be buffered before being used by external circuitry. Decouple both the REFOUT/ REFIN DAC pin and the REFOUT/REFIN ADC pin to AGND using a 220 nF capacitor. On power-up, the AD7294 is configured for use with an external reference. To enable the internal references, write a zero to both the D4 and D5 bits in the power-down register (see the Register Setting section for more details). Both the ADC and DAC references require a minimum of 60 μs to power up and settle to a 12-bit performance when a 220 nF decoupling capacitor is used. |
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