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TLV705185YFPR датащи(PDF) 4 Page - Texas Instruments |
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TLV705185YFPR датащи(HTML) 4 Page - Texas Instruments |
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4 / 36 page ![]() EN GND V IN V OUT 2 1 A B EN GND V IN V OUT 2 1 A B 4 TLV705, TLV705P SBVS151F – DECEMBER 2010 – REVISED APRIL 2017 www.ti.com Product Folder Links: TLV705 TLV705P Submit Documentation Feedback Copyright © 2010–2017, Texas Instruments Incorporated 5 Pin Configuration and Functions YFF, YFP Packages 4-Pin DSBGA Top View YFM Package 4-Pin PicoStar Top View Pin Functions PIN I/O DESCRIPTION NAME NO. GND A1 — Ground pin. EN A2 I Enable pin. Driving EN over 0.9 V turns on the regulator. Driving EN below 0.4 V places the regulator into shutdown mode, which reduces the operating current to 1 μA (nominal). VOUT B1 O Regulated output voltage pin. Placing a small 1-μF ceramic capacitor is required from this pin to ground to ensure stability. See Input and Output Capacitor Requirements for more details. VIN B2 I Input pin. TI recommends placing a small 1-µF capacitor from this pin to ground for good transient performance. See Input and Output Capacitor Requirements for more details. |
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