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MSP432P411VIPZ датащи(PDF) 34 Page - Texas Instruments |
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MSP432P411VIPZ датащи(HTML) 34 Page - Texas Instruments |
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34 / 212 page ![]() 34 MSP432P4111, MSP432P4011, MSP432P411Y MSP432P401Y, MSP432P411V, MSP432P401V SLASEA0A – DECEMBER 2017 – REVISED FEBRUARY 2018 www.ti.com Submit Documentation Feedback Product Folder Links: MSP432P4111 MSP432P4011 MSP432P411Y MSP432P401Y MSP432P411V MSP432P401V Specifications Copyright © 2017–2018, Texas Instruments Incorporated (1) Violation of the maximum frequency limitation for a given wait-state configuration results in nondeterministic data or instruction fetches from the flash memory. (2) In low-frequency active modes, the flash can always be accessed with 0 wait states, because the maximum MCLK frequency is limited to 128 kHz. (3) Other read modes refers to Read Margin 0, Read Margin 01, Program Verify, and Erase Verify. 5.8 Operating Mode Execution Frequency vs Flash Wait-State Requirements over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) PARAMETER NUMBER OF FLASH WAIT STATES FLASH READ MODE MAXIMUM SUPPORTED MCLK FREQUENCY(1) , (2) UNIT AM_LDO_VCORE0, AM_DCDC_VCORE0 AM_LDO_VCORE1, AM_DCDC_VCORE1 fMAX_NRM_FLWAIT0 0 Normal read mode 10 13 MHz fMAX_NRM_FLWAIT1 1 Normal read mode 21 27 MHz fMAX_NRM_FLWAIT2 2 Normal read mode 24 40 MHz fMAX_NRM_FLWAIT3 3 Normal read mode 24 48 MHz fMAX_ORM_FLWAIT0 0 Other read modes(3) 6 7 MHz fMAX_ORM_FLWAIT1 1 Other read modes(3) 12 14 MHz fMAX_ORM_FLWAIT2 2 Other read modes(3) 18 21 MHz fMAX_ORM_FLWAIT3 3 Other read modes(3) 24 28 MHz fMAX_ORM_FLWAIT4 4 Other read modes(3) 24 35 MHz fMAX_ORM_FLWAIT5 5 Other read modes(3) 24 42 MHz fMAX_ORM_FLWAIT6 6 Other read modes(3) 24 48 MHz |
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