FDMF3033 datasheet(13/22 Pages) ONSEMI

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FDMF3033

• Rev. 1.0

Description

The SPS FDMF3033 is a driver-plus-MOSFET module

optimized for the synchronous buck converter topology.

A PWM input signal is required to properly drive the

high-side and the low-side MOSFETs. The part is

capable of driving speed up to 1.5 MHz.

Power-On Reset (POR & UVLO)

The FDMF3033 incorporates a POR feature that

ensures both LDRV and HDRV are forced inactive

(LDRV = HDRV = 0) until UVLO > 3.4 V (typical rising

threshold). UVLO is performed on VCC (not on PVCC

or VIN).

After all gate drive blocks are fully powered on and

have finished the startup sequence, the internal driver

IC EN_PWM signal is released HIGH, enabling the

driver outputs. Once the driver POR has finished, the

driver follows the state of the PWM signal (it is assumed

that at startup the controller is either in a high-

impedance state or forcing the PWM signal to be within

the driver 3-state window).

Driver

State

3.4

2.9

VCC [V]

Disable

Enable

Figure 27.

UVLO

3-State PWM Input

The FDMF3033 incorporates a 3-state 5 V PWM input

gate drive design. The 3-state gate drive has both logic

HIGH and LOW levels, along with a 3-state shutdown

window. When the PWM input signal enters and

remains within the 3-state window for a defined hold-off

time (tD_HOLD-OFF), both GL and GH are pulled LOW.

This feature enables the gate drive to shutdown both

the high-side and the low-side MOSFETs to support

features such as phase shedding, a common feature on

multi-phase voltage regulators.

Table 1.

PWM Logic Table

PWM

FCCM

3-state

FCCM

The FCCM pin can be used to control Diode Emulation

or used to shut down the driver IC (with ICC < 6 µA,

ICC = current consumed by VCC and PVCC). When

FCCM is LOW, diode emulation is allowed. When

FCCM is HIGH, continuous conduction mode is forced.

High impedance on the input of FCCM shuts down the

driver IC (and module).

Table 2.

FCCM Logic Table

PWM

FCCM

Driver Enable

State

3-state

0 (ICC < 6 µA)

3-state

1 when IL > 0

0 when IL < 0

(FCCM = 1  Forced CCM)

Setting the FCCM pin to a HIGH state will allow for

forced

CCM

operation.

During

forced

CCM,

the

FDMF3033 will always follow the PWM signal and allow

for negative inductor current.

(FCCM = 0  Diode Emulation / DCM)

Setting the FCCM pin to a LOW state will enable diode

emulation. Diode emulation allows for higher converter

efficiency under light load situations. With diode

emulation is activated, the FDMF3033 will detect the

zero current crossing of the output inductor (at light

loads) and will turn off low side MOSFET gate GL to

prevent negative inductor current from flowing. Diode

emulation ensures Discontinuous Conduction Mode

(DCM) operation. Diode emulation is asynchronous to

the PWM signal. Therefore, the FDMF3033 will respond

to the FCCM input immediately after it changes state.

(FCCM = HiZ  Shutdown)

Setting the FCCM pin to a HIGH impedance state (HiZ)

will

shutdown

the

driver

with

ICC<6 µA. The

FDMF3033 requires a startup latency time of (<

15 µsec) when exiting a HiZ FCCM state. Low ICC driver

shutdown is often needed to support power saving

modes in multi-phase voltage regulator designs.

Power Sequence

The FDMF3033 requires four (4) input signals to

perform normal switching operation: VIN, VCC / PVCC,

PWM, and FCCM.

The VIN pins are tied to the system main DC power rail.

The PVCC and VCC pins are typically powered from

the same 5 V source. These pins can be either tied

directly together or tied together through an external RC

filter. The filter resistor / capacitor is used to de-couple

the switching noise from PVCC to VCC. Refer to Figure

1 for RC filter schematic.

The FCCM pin can be tied to the VCC rail with an

external pull-up resistor and it will maintain HIGH once

the VCC rail turns on. Or the FCCM pin can be directly

tied to the PWM controller for other purposes.

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