FEATURES SUMMARY
■ The µPSD3200 Family combines a Flash PSD
   architecture with an 8032 microcontroller core
   The µPSD3200 Family of Flash PSDs features
   dual banks of Flash memory, SRAM, general
   purpose I/O and programmable logic, supervisory
   functions and access via USB, I2C, ADC,
   DDC and PWM channels, and an on-board
   8032 microcontroller core, with two UARTs,
   three 16-bit Timer/Counters and one External
   Interrupt. As with other Flash PSD families, the
   µPSD3200 Family is also in-system programmable (ISP) via a JTAG ISP interface.
■ Large 8 KByte SRAM with battery back-up
   option
■ Dual bank Flash memories
   – 128 KByte or 256 KByte main Flash memory
   – 32 KByte secondary Flash memory
■ Content Security
   – Block access to Flash memory
■ Programmable Decode PLD for flexible address
   mapping of all memories.
■ High-speed clock standard 8032 core (12-cycle)
■ USB Interface (µPSD3234A-40U6 only)
■ I2C interface for peripheral connections
■ Five Pulse Width Modulator (PWM) channels
■ Standalone Display Data Channel (DDC)
■ Six I/O ports with up to 50 I/O pins
■ 3000 gate PLD with 16 macrocells
■ Supervisor functions
■ In-System Programming (ISP) via JTAG
■ Zero-Power Technology
■ Single Supply Voltage
   – 4.5 to 5.5 V
   – 3.0 to 3.6 V