DESCRIPTION
The SY10/100H606 are 6-bit, registered, single supply TTL-to-PECL translators. The devices feature differential PECL outputs as well as a choice between either a differential PECL clock input or a TTL clock input. The asynchronous master reset control is a PECL level input.

FEATURES
■ Differential 50Ω ECL outputs
■ Choice between differential PECL or TTL clock input
■ Single +5V power supply
■ VBB output for single-ended use
■ Multiple power and ground pins to minimize noise
■ Specified within-device skew
■ Fully compatible with MC10H/100H606
■ Available in 28-pin PLCC package