DESCRIPTION
The SY10/100E154 offer five 2:1 multiplexers followed by latches with differential outputs, designed for use in new, high-performance ECL systems. The two external Latch-Enable signals (LEN1, LEN2) are gated through a logical OR operation before use as control for the five latches. When both LEN1 and LEN2 are at a logic LOW, the latches are transparent, thus presenting the data from the multiplexers at the output pins. If either LEN1 or LEN2 (or both) are at a logic HIGH, the outputs are latched.

FEATURES
■ 750ps max. LEN to output
■ Extended 100E VEE range of –4.2V to –5.5V
■ 700ps max. D to output
■ Differential outputs
■ Asynchronous Master Reset
■ Dual latch-enables
■ Fully compatible with industry standard 10KH, 100K ECL levels
■ Internal 75KΩ input pulldown resistors
■ Fully compatible with Motorola MC10E/100E154
■ Available in 28-pin PLCC package