Dual D Flip-Flop with Set and Reset
High-Performance Silicon-Gate CMOS

The SL74HC74 is identical in pinout to the LS/ALS74. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALSTTL outputs.
This device consists of two D flip-flops with individual Set, Reset, and Clock inputs. Information at a D-input is transferred to the corresponding Q output on the next positive going edge of the clock input. Both Q and Q outputs are available from each flip-flop. The Set and Reset inputs are asynchronous.

 • Outputs Directly Interface to CMOS, NMOS, and TTL
 • Operating Voltage Range: 2.0 to 6.0 V
 • Low Input Current: 1.0 μA
 • High Noise Immunity Characteristic of CMOS Devices