• High-performance fanout buffer clock and fanout buffer
• Input clock signal is distributed to one LVPECL and one
LVCMOS output
• Configurable output dividers for both LVPECL and LVCMOS outputs
• Supports clock frequencies up to 1000MHz (LVPECL) and up to 200MHz (LVCMOS)
• Flexible differential input supports LVPECL, LVDS and CML
• VBB generator output supports single-ended input signal applications
• Optimized for low phase noise
• 650ps delay between LVCMOS and LVPECL minimizes coupling between outputs
• Supply voltage: 3.3V or 2.5V
• -40°C to 85°C ambient operating temperature
• 16 VFQFPN package (3 x 3 mm)