Functional Description

The CY7C42X5V are high-speed, low-power, first-in first-out (FIFO) memories with clocked read and write interfaces. All are 18 bits wide. The CY7C42X5V can be cascaded to increase FIFO depth. Programmable features include Almost Full/Almost Empty flags. These FIFOs provide solutions for a wide variety of data buffering needs, including high-speed data acquisition, multiprocessor interfaces, and communications

buffering.

Features

• 3.3V operation for low power consumption and easy integration into low-voltage systems

• High-speed, low-power, first-in first-out (FIFO) memories

• 64 x 18 (CY7C4425V)

• 256 x 18 (CY7C4205V)

• 512 x 18 (CY7C4215V)

• 1K x 18 (CY7C4225V)

• 2K x 18 (CY7C4235V)

• 4K x 18 (CY7C4245V)

• 0.65µ CMOS

• High-speed 67-MHz operation (15-ns read/write cycle times)

• Low power

— ICC = 30 mA

• 5V tolerant inputs (VIH MAX = 5V)

• Fully asynchronous and simultaneous read and write operation

• Empty, Full, Half Full, and programmable Almost Empty and Almost Full status flags

• TTL-compatible

• Retransmit function

• Output Enable (OE) pin

• Independent read and write enable pins

• Supports free-running 50% duty cycle clock inputs

• Width-Expansion Capability

• Depth-Expansion Capability

• 64-pin 14 × 14 TQFP and 64-pin 10 × 10 STQFP

• Pb-Free packages available