Controlled Baseline
− One Assembly/Test Site, One Fabrication
Site
Extended Temperature Performance of Up
To −55°C to 125°C
Enhanced Diminishing Manufacturing
Sources (DMS) Support
Enhanced Product-Change Notification
Qualification Pedigree†
3-State Outputs Drive Bus Lines or Buffer
Memory Address Registers
High-Current Outputs Drive Up To 15
LSTTL Loads

description/ordering information
This octal buffer and line driver is designed specifically to improve both the performance and density of 3-state
memory address drivers, clock drivers, and bus-oriented receivers and transmitters. The SN74HC244 is
organized as two 4-bit buffers/drivers with separate output-enable (OE) inputs. When OE is low, the device
passes noninverted data from the A inputs to the Y outputs. When OE is high, the outputs are in the
high-impedance state.