State-of-the-Art EPIC-IIBE BiCMOS Design
Significantly Reduces Power Dissipation
ESD Protection Exceeds 2000 V Per
MIL-STD-883, Method 3015; Exceeds 200 V
Using Machine Model (C = 200 pF, R = 0)
Latch-Up Performance Exceeds 500 mA Per
JEDEC Standard JESD-17
Typical VOLP (Output Ground Bounce) < 1 V
at VCC = 5 V, TA = 25°C
High-Drive Outputs (–32-mA IOH,
64-mA IOL)
Package Options Include Plastic
Small-Outline (DW), Shrink Small-Outline
(DB), and Thin Shrink Small-Outline (PW)
Packages, Ceramic Chip Carriers (FK), and
Plastic (N) and Ceramic (J) DIPs

description
The ’ABT640 bus transceivers are designed for
asynchronous communication between data
buses. These devices transmit inverted data from
the A bus to the B bus or from the B bus to the
A bus, depending on the level at the directioncontrol
(DIR) input. The output-enable (OE) input
can be used to disable the device so that the
buses are effectively isolated.
To ensure the high-impedance state during power
up or power down, OE should be tied to VCC
through a pullup resistor; the minimum value of
the resistor is determined by the current-sinking
capability of the driver.
The SN54ABT640 is characterized for operation over the full military temperature range of –55°C to 125°C. The
SN74ABT640 is characterized for operation from –40°C to 85°C.