FEATURES
· Sixteen Low-Voltage Differential Transceivers.
Designed for Signaling Rates up to 200 Mbps
per Receiver or 650 Mbps per Transmitter.
· Simplex (Point-to-Point) or Half-Duplex
(Multipoint) Interface
· Typical Differential Output Voltage of 340 mV
Into a 50-W Load
· Integrated 110-W Line Termination on
'LVDM1677 Product
· Propagation Delay Time:
– Driver: 2.5 ns Typ
– Receiver: 3 ns Typ
· Driver is High Impedance When Disabled or
With VCC < 1.5 V for Power Up/Down
Glitch-Free Performance and Hot-Plugging
Events
· Bus-Terminal ESD Protection Exceeds 12 kV
· Low-Voltage TTL (LVTTL) Logic Input Levels
Are 5-V Tolerant
· Packaged in Thin Shrink Small-Outline
Package With 20 mil Terminal Pitch

DESCRIPTION
The SN65LVDM1676 and SN65LVDM1677
(integrated termination) are sixteen differential line
transmitters or receivers (tranceivers) that use
low-voltage differential signaling (LVDS) to achieve
signaling rates up to 200 Mbps per transceiver
configured as a receiver and up to 650 Mbps per
transceiver configured as a transmitter. These
products are similar to TIA/EIA-644 standard
compliant devices (SN65LVDS) counterparts except
that the output current of the drivers are doubled.
This modification provides a minimum differential
output voltage magnitude of 247 mV into a 50-W load
and allows double-terminated lines and half-duplex
operation. The receivers detect a voltage difference
of 100 mV with up to 1 V of ground potential
difference between a transmitter and receiver.