State-of-the-Art BiCMOS Design
Significantly Reduces ICCZ
3-State Outputs Drive Bus Lines or
Buffer-Memory Address Registers
P-N-P Inputs Reduce DC Loading
High-Impedance State During Power Up
and Power Down
Package Options Include Plastic
Small-Outline (DW) Packages and Standard
Plastic 300-mil DIPs (N)

description
This octal buffer and line driver is designed
specifically to improve both the performance and
density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. Taken
together with the SN64BCT240 and SN64BCT241, these devices provide the choice of selected combinations
of inverting and noninverting outputs, symmetrical active-low output-enable (OE) inputs, and complementary
OE and OE inputs.
The SN64BCT244 is organized as two 4-bit buffers/line drivers with separate output-enable (OE) inputs. When
OE is low, the device passes data from the A inputs to the Y outputs. When OE is high, the outputs are in the
high-impedance state.
The outputs are in a high-impedance state during power up and power down while the supply voltage is less
than approximately 3 V.
The SN64BCT244 is characterized for operation from −40°C to 85°C.